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Assembler Language Reference
Contents
About This Book
Who Should Use This Book
Highlighting
Case-Sensitivity in AIX
ISO 9000
Related Publications
Assembler Overview
Features of the AIX Assembler
Assembler Installation
Processing and Storage
POWER family and PowerPC Architecture Overview
Branch Processor
Fixed-Point Processor
Floating-Point Processor
Syntax and Semantics
Character Set
Reserved Words
Line Format
Statements
Symbols
Constants
Operators
Expressions
Addressing
Absolute Addressing
Absolute Immediate Addressing
Relative Immediate Addressing
Explicit-Based Addressing
Implicit-Based Addressing
Location Counter
Assembling and Linking a Program
Assembling and Linking a Program
Understanding Assembler Passes
Interpreting an Assembler Listing
Interpreting a Symbol Cross-Reference
Subroutine Linkage Convention
Understanding and Programming the TOC
Running a Program
Extended Instruction Mnemonics
Extended Mnemonics of Branch Instructions
Extended Mnemonics of Condition Register Logical Instructions
Extended Mnemonics of Fixed-Point Arithmetic Instructions
Extended Mnemonics of Fixed-Point Compare Instructions
Extended Mnemonics of Fixed-Point Load Instructions
Extended Mnemonics of Fixed-Point Logical Instructions
Extended Mnemonics of Fixed-Point Trap Instructions
Extended Mnemonic mtcr for Moving to the Condition Register
Extended Mnemonics of Moving from or to Special-Purpose Registers
Extended Mnemonics of 32-bit Fixed-Point Rotate and Shift Instructions
Extended Mnemonics of 64-bit Fixed-Point Rotate and Shift Instructions
Migrating Source Programs
Related Information
Functional Differences for POWER family and PowerPC Instructions
Differences between POWER family and PowerPC Instructions with the Same Op Code
Extended Mnemonics Changes
POWER family Instructions Deleted from PowerPC
Added PowerPC Instructions
Instructions Available Only for the PowerPC 601 RISC Microprocessor
Migration of Branch Conditional Statements with No Separator after Mnemonic
Instruction Set
abs (Absolute) Instruction
add (Add) or cax (Compute Address) Instruction
addc or a (Add Carrying) Instruction
adde or ae (Add Extended) Instruction
addi (Add Immediate) or cal (Compute Address Lower) Instruction
addic or ai (Add Immediate Carrying) Instruction
addic. or ai. (Add Immediate Carrying and Record) Instruction
addis or cau (Add Immediate Shifted) Instruction
addme or ame (Add to Minus One Extended) Instruction
addze or aze (Add to Zero Extended) Instruction
and (AND) Instruction
andc (AND with Complement) Instruction
andi. or andil. (AND Immediate) Instruction
andis. or andiu. (AND Immediate Shifted) Instruction
b (Branch) Instruction
bc (Branch Conditional) Instruction
bcctr or bcc (Branch Conditional to Count Register) Instruction
bclr or bcr (Branch Conditional Link Register) Instruction
clcs (Cache Line Compute Size) Instruction
clf (Cache Line Flush) Instruction
cli (Cache Line Invalidate) Instruction
cmp (Compare) Instruction
cmpi (Compare Immediate) Instruction
cmpl (Compare Logical) Instruction
cmpli (Compare Logical Immediate) Instruction
cntlzd (Count Leading Zeros Double Word) Instruction
cntlzw or cntlz (Count Leading Zeros Word) Instruction
crand (Condition Register AND) Instruction
crandc (Condition Register AND with Complement) Instruction
creqv (Condition Register Equivalent) Instruction
crnand (Condition Register NAND) Instruction
crnor (Condition Register NOR) Instruction
cror (Condition Register OR) Instruction
crorc (Condition Register OR with Complement) Instruction
crxor (Condition Register XOR) Instruction
dcbf (Data Cache Block Flush) Instruction
dcbi (Data Cache Block Invalidate) Instruction
dcbst (Data Cache Block Store) Instruction
dcbt (Data Cache Block Touch) Instruction
dcbtst (Data Cache Block Touch for Store) Instruction
dcbz or dclz (Data Cache Block Set to Zero) Instruction
dclst (Data Cache Line Store) Instruction
div (Divide) Instruction
divd (Divide Double Word) Instruction
divdu (Divide Double Word Unsigned) Instruction
divs (Divide Short) Instruction
divw (Divide Word) Instruction
divwu (Divide Word Unsigned) Instruction
doz (Difference or Zero) Instruction
dozi (Difference or Zero Immediate) Instruction
eciwx (External Control In Word Indexed) Instruction
ecowx (External Control Out Word Indexed) Instruction
eieio (Enforce In-Order Execution of I/O) Instruction
extsw (Extend Sign Word) Instruction
eqv (Equivalent) Instruction
extsb (Extend Sign Byte) Instruction
extsh or exts (Extend Sign Halfword) Instruction
fabs (Floating Absolute Value) Instruction
fadd or fa (Floating Add) Instruction
fcfid (Floating Convert from Integer Double Word) Instruction
fcmpo (Floating Compare Ordered) Instruction
fcmpu (Floating Compare Unordered) Instruction
fctid (Floating Convert to Integer Double Word) Instruction
fctidz (Floating Convert to Integer Double Word with Round toward Zero) Instruction
fctiw or fcir (Floating Convert to Integer Word) Instruction
fctiwz or fcirz (Floating Convert to Integer Word with Round to Zero) Instruction
fdiv or fd (Floating Divide) Instruction
fmadd or fma (Floating Multiply-Add) Instruction
fmr (Floating Move Register) Instruction
fmsub or fms (Floating Multiply-Subtract) Instruction
fmul or fm (Floating Multiply) Instruction
fnabs (Floating Negative Absolute Value) Instruction
fneg (Floating Negate) Instruction
fnmadd or fnma (Floating Negative Multiply-Add) Instruction
fnmsub or fnms (Floating Negative Multiply-Subtract) Instruction
fres (Floating Reciprocal Estimate Single) Instruction
frsp (Floating Round to Single Precision) Instruction
frsqrte (Floating Reciprocal Square Root Estimate) Instruction
fsel (Floating-Point Select) Instruction
fsqrt (Floating Square Root, Double-Precision) Instruction
fsqrts (Floating Square Root Single) Instruction
fsub or fs (Floating Subtract) Instruction
icbi (Instruction Cache Block Invalidate) Instruction
isync or ics (Instruction Synchronize) Instruction
lbz (Load Byte and Zero) Instruction
lbzu (Load Byte and Zero with Update) Instruction
lbzux (Load Byte and Zero with Update Indexed) Instruction
lbzx (Load Byte and Zero Indexed) Instruction
ld (Load Double Word) Instruction
ldarx (Store Double Word Reserve Indexed) Instruction
ldu (Store Double Word with Update) Instruction
ldux (Store Double Word with Update Indexed) Instruction
ldx (Store Double Word Indexed) Instruction
lfd (Load Floating-Point Double) Instruction
lfdu (Load Floating-Point Double with Update) Instruction
lfdux (Load Floating-Point Double with Update Indexed) Instruction
lfdx (Load Floating-Point Double-Indexed) Instruction
lfq (Load Floating-Point Quad) Instruction
lfqu (Load Floating-Point Quad with Update) Instruction
lfqux (Load Floating-Point Quad with Update Indexed) Instruction
lfqx (Load Floating-Point Quad Indexed) Instruction
lfs (Load Floating-Point Single) Instruction
lfsu (Load Floating-Point Single with Update) Instruction
lfsux (Load Floating-Point Single with Update Indexed) Instruction
lfsx (Load Floating-Point Single Indexed) Instruction
lha (Load Half Algebraic) Instruction
lhau (Load Half Algebraic with Update) Instruction
lhaux (Load Half Algebraic with Update Indexed) Instruction
lhax (Load Half Algebraic Indexed) Instruction
lhbrx (Load Half Byte-Reverse Indexed) Instruction
lhz (Load Half and Zero) Instruction
lhzu (Load Half and Zero with Update) Instruction
lhzux (Load Half and Zero with Update Indexed) Instruction
lhzx (Load Half and Zero Indexed) Instruction
lmw or lm (Load Multiple Word) Instruction
lq (Load Quad Word) Instruction
lscbx (Load String and Compare Byte Indexed) Instruction
lswi or lsi (Load String Word Immediate) Instruction
lswx or lsx (Load String Word Indexed) Instruction
lwa (Load Word Algebraic) Instruction
lwarx (Load Word and Reserve Indexed) Instruction
lwaux (Load Word Algebraic with Update Indexed) Instruction
lwax (Load Word Algebraic Indexed) Instruction
lwbrx or lbrx (Load Word Byte-Reverse Indexed) Instruction
lwz or l (Load Word and Zero) Instruction
lwzu or lu (Load Word with Zero Update) Instruction
lwzux or lux (Load Word and Zero with Update Indexed) Instruction
lwzx or lx (Load Word and Zero Indexed) Instruction
maskg (Mask Generate) Instruction
maskir (Mask Insert from Register) Instruction
mcrf (Move Condition Register Field) Instruction
mcrfs (Move to Condition Register from FPSCR) Instruction
mcrxr (Move to Condition Register from XER) Instruction
mfcr (Move from Condition Register) Instruction
mffs (Move from FPSCR) Instruction
mfmsr (Move from Machine State Register) Instruction
mfocrf (Move from One Condition Register Field) Instruction
mfspr (Move from Special-Purpose Register) Instruction
mfsr (Move from Segment Register) Instruction
mfsri (Move from Segment Register Indirect) Instruction
mfsrin (Move from Segment Register Indirect) Instruction
mtcrf (Move to Condition Register Fields) Instruction
mtfsb0 (Move to FPSCR Bit 0) Instruction
mtfsb1 (Move to FPSCR Bit 1) Instruction
mtfsf (Move to FPSCR Fields) Instruction
mtfsfi (Move to FPSCR Field Immediate) Instruction
mtocrf (Move to One Condition Register Field) Instruction
mtspr (Move to Special-Purpose Register) Instruction
mul (Multiply) Instruction
mulhd (Multiply High Double Word) Instruction
mulhdu (Multiply High Double Word Unsigned) Instruction
mulhw (Multiply High Word) Instruction
mulhwu (Multiply High Word Unsigned) Instruction
mulld (Multiply Low Double Word) Instruction
mulli or muli (Multiply Low Immediate) Instruction
mullw or muls (Multiply Low Word) Instruction
nabs (Negative Absolute) Instruction
nand (NAND) Instruction
neg (Negate) Instruction
nor (NOR) Instruction
or (OR) Instruction
orc (OR with Complement) Instruction
ori or oril (OR Immediate) Instruction
oris or oriu (OR Immediate Shifted) Instruction
rac (Real Address Compute) Instruction
rfi (Return from Interrupt) Instruction
rfid (Return from Interrupt Double Word) Instruction
rfsvc (Return from SVC) Instruction
rldcl (Rotate Left Double Word then Clear Left) Instruction
rldicl (Rotate Left Double Word Immediate then Clear Left) Instruction
rldcr (Rotate Left Double Word then Clear Right) Instruction
rldic (Rotate Left Double Word Immediate then Clear) Instruction
rldicl (Rotate Left Double Word Immediate then Clear Left) Instruction
rldicr (Rotate Left Double Word Immediate then Clear Right) Instruction
rldimi (Rotate Left Double Word Immediate then Mask Insert) Instruction
rlmi (Rotate Left Then Mask Insert) Instruction
rlwimi or rlimi (Rotate Left Word Immediate Then Mask Insert) Instruction
rlwinm or rlinm (Rotate Left Word Immediate Then AND with Mask) Instruction
rlwnm or rlnm (Rotate Left Word Then AND with Mask) Instruction
rrib (Rotate Right and Insert Bit) Instruction
sc (System Call) Instruction
scv (System Call Vectored) Instruction
si (Subtract Immediate) Instruction
si. (Subtract Immediate and Record) Instruction
sld (Shift Left Double Word) Instruction
sle (Shift Left Extended) Instruction
sleq (Shift Left Extended with MQ) Instruction
sliq (Shift Left Immediate with MQ) Instruction
slliq (Shift Left Long Immediate with MQ) Instruction
sllq (Shift Left Long with MQ) Instruction
slq (Shift Left with MQ) Instruction
slw or sl (Shift Left Word) Instruction
srad (Shift Right Algebraic Double Word) Instruction
sradi (Shift Right Algebraic Double Word Immediate) Instruction
sraiq (Shift Right Algebraic Immediate with MQ) Instruction
sraq (Shift Right Algebraic with MQ) Instruction
sraw or sra (Shift Right Algebraic Word) Instruction
srawi or srai (Shift Right Algebraic Word Immediate) Instruction
srd (Shift Right Double Word) Instruction
sre (Shift Right Extended) Instruction
srea (Shift Right Extended Algebraic) Instruction
sreq (Shift Right Extended with MQ) Instruction
sriq (Shift Right Immediate with MQ) Instruction
srliq (Shift Right Long Immediate with MQ) Instruction
srlq (Shift Right Long with MQ) Instruction
srq (Shift Right with MQ) Instruction
srw or sr (Shift Right Word) Instruction
stb (Store Byte) Instruction
stbu (Store Byte with Update) Instruction
stbux (Store Byte with Update Indexed) Instruction
stbx (Store Byte Indexed) Instruction
std (Store Double Word) Instruction
stdcx. (Store Double Word Conditional Indexed) Instruction
stdu (Store Double Word with Update) Instruction
stdux (Store Double Word with Update Indexed) Instruction
stdx (Store Double Word Indexed) Instruction
stfd (Store Floating-Point Double) Instruction
stfdu (Store Floating-Point Double with Update) Instruction
stfdux (Store Floating-Point Double with Update Indexed) Instruction
stfdx (Store Floating-Point Double Indexed) Instruction
stfiwx (Store Floating-Point as Integer Word Indexed)
stfq (Store Floating-Point Quad) Instruction
stfqu (Store Floating-Point Quad with Update) Instruction
stfqux (Store Floating-Point Quad with Update Indexed) Instruction
stfqx (Store Floating-Point Quad Indexed) Instruction
stfs (Store Floating-Point Single) Instruction
stfsu (Store Floating-Point Single with Update) Instruction
stfsux (Store Floating-Point Single with Update Indexed) Instruction
stfsx (Store Floating-Point Single Indexed) Instruction
sth (Store Half) Instruction
sthbrx (Store Half Byte-Reverse Indexed) Instruction
sthu (Store Half with Update) Instruction
sthux (Store Half with Update Indexed) Instruction
sthx (Store Half Indexed) Instruction
stmw or stm (Store Multiple Word) Instruction
stq (Store Quad Word) Instruction
stswi or stsi (Store String Word Immediate) Instruction
stswx or stsx (Store String Word Indexed) Instruction
stw or st (Store) Instruction
stwbrx or stbrx (Store Word Byte-Reverse Indexed) Instruction
stwcx. (Store Word Conditional Indexed) Instruction
stwu or stu (Store Word with Update) Instruction
stwux or stux (Store Word with Update Indexed) Instruction
stwx or stx (Store Word Indexed) Instruction
subf (Subtract From) Instruction
subfc or sf (Subtract from Carrying) Instruction
subfe or sfe (Subtract from Extended) Instruction
subfic or sfi (Subtract from Immediate Carrying) Instruction
subfme or sfme (Subtract from Minus One Extended) Instruction
subfze or sfze (Subtract from Zero Extended) Instruction
svc (Supervisor Call) Instruction
sync (Synchronize) or dcs (Data Cache Synchronize) Instruction
td (Trap Double Word) Instruction
tdi (Trap Double Word Immediate) Instruction
tlbie or tlbi (Translation Look-Aside Buffer Invalidate Entry) Instruction
tlbld (Load Data TLB Entry) Instruction
tlbli (Load Instruction TLB Entry) Instruction
tlbsync (Translation Look-Aside Buffer Synchronize) Instruction
tw or t (Trap Word) Instruction
twi or ti (Trap Word Immediate) Instruction
xor (XOR) Instruction
xori or xoril (XOR Immediate) Instruction
xoris or xoriu (XOR Immediate Shift) Instruction
Pseudo-ops
Pseudo-ops Overview
.align Pseudo-op
.bb Pseudo-op
.bc Pseudo-op
.bf Pseudo-op
.bi Pseudo-op
.bs Pseudo-op
.byte Pseudo-op
.comm Pseudo-op
.csect Pseudo-op
.double Pseudo-op
.drop Pseudo-op
.dsect Pseudo-op
.eb Pseudo-op
.ec Pseudo-op
.ef Pseudo-op
.ei Pseudo-op
.es Pseudo-op
.extern Pseudo-op
.file Pseudo-op
.float Pseudo-op
.function Pseudo-op
.globl Pseudo-op
.hash Pseudo-op
.lcomm Pseudo-op
.lglobl Pseudo-op
.line Pseudo-op
.long Pseudo-op
.llong Pseudo-op
.machine Pseudo-op
.org Pseudo-op
.quad Pseudo-op
.ref Pseudo-op
.rename Pseudo-op
.set Pseudo-op
.short Pseudo-op
.source Pseudo-op
.space Pseudo-op
.stabx Pseudo-op
.string Pseudo-op
.tbtag Pseudo-op
.tc Pseudo-op
.toc Pseudo-op
.tocof Pseudo-op
.using Pseudo-op
.vbyte Pseudo-op
.weak Pseudo-op
.xline Pseudo-op
Appendix A. Messages
Appendix B. Instruction Set Sorted by Mnemonic
Appendix C. Instruction Set Sorted by Primary and Extended Op Code
Appendix D. Instructions Common to POWER family, POWER2, and PowerPC
Appendix E. POWER family and POWER2 Instructions
Appendix F. PowerPC Instructions
Appendix G. PowerPC 601 RISC Microprocessor Instructions
Appendix H. Value Definitions
Bits 0-5
Bits 6-30
Bit 31
Appendix I. Notices
Trademarks
Index
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