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Assembler Language Reference

tlbie or tlbi (Translation Look-Aside Buffer Invalidate Entry) Instruction

Purpose

Makes a translation look-aside buffer entry invalid for subsequent address translations.

Notes:
  1. The tlbie instruction is optional for the PowerPC architecture. It is supported on PowerPC 601 RISC Microprocessor, PowerPC 603 RISC Microprocessor and PowerPC 604 RISC Microprocessor.
  2. tlbi is a POWER family instruction.

Syntax

Bits Value
0-5 31
6-9 ///
10 L
11-15 ///
16-20 RB
21-30 306
31 /
PowerPC 
tlbie RB, L
POWER family 
tlbi RA, RB

Description

The PowerPC instruction tlbie searches the Translation Look-Aside Buffer (TLB) for an entry corresponding to the effective address (EA). The search is done regardless of the setting of Machine State Register (MSR) Instruction Relocate bit or the MSR Data Relocate bit. The search uses a portion of the EA including the least significant bits, and ignores the content of the Segment Registers. Entries that satisfy the search criteria are made invalid so will not be used to translate subsequent storage accesses.

The POWER family instruction tlbi expands the EA to its virtual address and invalidates any information in the TLB for the virtual address, regardless of the setting of MSR Instruction Relocate bit or the MSR Data Relocate bit. The EA is placed into the general-purpose register (GPR) RA.

Consider the following when using the POWER family instruction tlbi:

The L field is used to specify a 4 KB page size (L = 0) or a large page size (L = 1).

The tlbie and tlbi instructions have one syntax form and do not affect the Fixed-Point Exception Register. If the Record bit (Rc) is set to 1, the instruction form is invalid.

Parameters

The following parameter pertains to the PowerPC instruction, tlbie, only:

RB Specifies the source general-purpose register containing the EA for the search.
L Specifies the page size.

The following parameters pertain to the POWER family instruction, tlbi, only:

RA Specifies the source general-purpose register for EA calculation and, if RA is not GPR 0, the target general-purpose register for operation.
RB Specifies source general-purpose register for EA calculation.

Security

The tlbie and tlbi instructions are privileged.

Related Information

Processing and Storage.

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