Assembler Language Reference

lbzux (Load Byte and Zero with Update Indexed) Instruction

Purpose

Loads a byte of data from a specified location in memory into a general-purpose register, setting the remaining 24 bits to 0, and places the address in the a second general-purpose register.

Syntax

Bits	Value
0-5	31
6-10	RT
11-15	RA
16-20	RB
21-30	119
31	/

lbzux

RT, RA, RB

Description

The lbzux instruction loads a byte in storage addressed by the effective address (EA) into bits 24-31 of the target general-purpose register (GPR) RT and sets bits 0-23 of GPR RT to 0.

If RA is not 0, the EA is the sum of the contents of GPR RA and GPR RB. If RA is 0, then the EA is the contents of RB.

If RA does not equal RT and RA does not equal 0, and the storage access does not cause an Alignment interrupt or a Data Storage interrupt, then the EA is stored in GPR RA.

The lbzux instruction has one syntax form and does not affect the Fixed-Point Exception Register.

Parameters

RT	Specifies target general-purpose register where result of operation is stored.
RA	Specifies source general-purpose register for EA calculation and possible address update.
RB	Specifies source general-purpose register for EA calculation.

Examples

The following code loads the value located at storage into GPR 6 and loads the address of storage into GPR 5:

storage: .byte 0x40
  .
  .
# Assume GPR 5 contains 0x0000 0000.
# Assume GPR 4 is the storage address.
lbzux 6,5,4
# GPR 6 now contains 0x0000 0040.
# GPR 5 now contains the storage address.

Related Information

Fixed-Point Processor .

Fixed-Point Load and Store with Update Instructions .