Reinitializes the Machine State Register and starts processing after a supervisor call (svc).
Note: The rfsvc instruction is supported only in the POWER family architecture.
| Bits | Value |
|---|---|
| 0-5 | 19 |
| 6-10 | /// |
| 11-15 | /// |
| 16-20 | /// |
| 21-30 | 82 |
| 31 | LK |
POWER family
rfsvc
The rfsvc instruction reinitializes the Machine State Register (MSR) and starts processing after a supervisor call. This instruction places bits 16-31 of the Count Register into bits 16-31 of the Machine State Register (MSR), and then begins fetching and processing instructions at the address contained in the Link Register, using the new MSR value.
If the Link bit (LK) is set to 1, then the contents of the Link Register are undefined.
The rfsvc instruction has one syntax form and does not affect Condition Register Field 0 or the Fixed-Point Exception Register.
The rfsvc instruction is privileged and synchronizing.
The svc (Supervisor Call) instruction.