Places the complemented result of XORing two Condition Register bits in a Condition Register bit.
| Bits | Value |
|---|---|
| 0-5 | 19 |
| 6-10 | BT |
| 11-15 | BA |
| 16-20 | BB |
| 21-30 | 289 |
| 31 | / |
| creqv | BT, BA, BB |
See Extended Mnemonics of Condition Register Logical Instructions for more information.
The creqv instruction logically XORs the Condition Register bit specified in BA and the Condition Register bit specified by BB and places the complemented result in the target Condition Register bit specified by BT.
The creqv instruction has one syntax form and does not affect the Fixed-Point Exception Register.
| BT | Specifies target Condition Register bit where result of operation is stored. |
| BA | Specifies source Condition Register bit for operation. |
| BB | Specifies source Condition Register bit for operation. |
The following code places the complemented result of XORing Condition Register bits 8 and 4 into Condition Register bit 4:
# Assume Condition Register bit 8 is 1. # Assume Condition Register bit 4 is 0. creqv 4,8,4 # Condition Register bit 4 is now 0.
Condition Register Instructions .