Copies the contents of a general-purpose register into one condition register field under control of a field mask.
| Bits | Value |
|---|---|
| 0-5 | 31 |
| 6-10 | RT |
| 11 | / |
| 12-19 | FXM |
| 20 | / |
| 21-30 | 144 |
| 31 | / |
| mtocrf | FXM, RS |
See Extended Mnemonics of Condition Register Logical Instructions for more information.
The mtocrf instruction copies the contents of source general-purpose register (GPR) RS into the condition register under the control of field mask FXM.
Field mask FXM is defined as follows:
| Bit | Description |
|---|---|
| 12 | CR 00-03 is updated with the contents of GPR RS 00-03. |
| 13 | CR 04-07 is updated with the contents of GPR RS 04-07. |
| 14 | CR 08-11 is updated with the contents of GPR RS 08-11. |
| 15 | CR 12-15 is updated with the contents of GPR RS 12-15. |
| 16 | CR 16-19 is updated with the contents of GPR RS 16-19. |
| 17 | CR 20-23 is updated with the contents of GPR RS 20-23. |
| 18 | CR 24-27 is updated with the contents of GPR RS 24-27. |
| 19 | CR 28-31 is updated with the contents of GPR RS 28-31. |
The mtocrf instruction has one syntax form and does not affect the Fixed-Point Exception Register.
| FXM | Specifies field mask. |
| RS | Specifies source general-purpose register for operation. |
The following code copies bits 00-03 of GPR 5 into Condition Register Field 0:
# Assume GPR 5 contains 0x7542 FFEE. # Use the mask for Condition Register # Field 0 (0x80 = b'1000 0000'). mtocrf 0x80,5 # Condition Register Field 0 now contains b'0111'.
Fixed-Point Move to or from Special-Purpose Registers Instructions.