Assembler Language Reference

addc or a (Add Carrying) Instruction

Purpose

Adds the contents of two general-purpose registers and places the result in a general-purpose register.

Syntax

Bits	Value
0-5	31
6-10	RT
11-15	RA
16-20	RB
21	OE
22-30	10
31	Rc

PowerPC
addc	RT, RA, RB
addc.	RT, RA, RB
addco	RT, RA, RB
addco.	RT, RA, RB

a	RT, RA, RB
a.	RT, RA, RB
ao	RT, RA, RB
ao.	RT, RA, RB

Description

The addc and a instructions place the sum of the contents of general-purpose register (GPR) RA and GPR RB into the target GPR RT.

The addc instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

The a instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

Syntax Form	Overflow Exception (OE)	Fixed-Point Exception Register	Record Bit (Rc)	Condition Register Field 0
addc	0	CA	0	None
addc.	0	CA	1	LT,GT,EQ,SO
addco	1	SO,OV,CA	0	None
addco.	1	SO,OV,CA	1	LT,GT,EQ,SO
a	0	CA	0	None
a.	0	CA	1	LT,GT,EQ,SO
ao	1	SO,OV,CA	0	None
ao.	1	SO,OV,CA	1	LT,GT,EQ,SO

The four syntax forms of the addc instruction and the four syntax forms of the a instruction always affect the Carry bit (CA) in the Fixed-Point Exception Register. If the syntax form sets the Overflow Exception (OE) bit to 1, the instruction affects the Summary Overflow (SO) and Overflow (OV) bits in the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RT	Specifies target general-purpose register where result of operation is stored.
RA	Specifies source general-purpose register for operation.
RB	Specifies source general-purpose register for operation.

Examples

The following code adds the contents of GPR 4 to the contents of GPR 10 and stores the result in GPR 6:

# Assume GPR 4 contains 0x9000 3000.
# Assume GPR 10 contains 0x8000 7000.
addc 6,4,10
# GPR 6 now contains 0x1000 A000.

The following code adds the contents of GPR 4 to the contents of GPR 10, stores the result in GPR 6, and sets Condition Register Field 0 to reflect the result of the operation:
```
# Assume GPR 4 contains 0x7000 3000.
# Assume GPR 10 contains 0xFFFF FFFF.
addc. 6,4,10
# GPR 6 now contains 0x7000 2FFF.
```

The following code adds the contents of GPR 4 to the contents of GPR 10, stores the result in GPR 6, and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register to reflect the result of the operation:
```
# Assume GPR 4 contains 0x9000 3000.
# Assume GPR 10 contains 0x7B41 92C0.
addco 6,4,10
# GPR 6 now contains 0x0B41 C2C0.
```

The following code adds the contents of GPR 4 to the contents of GPR 10, stores the result in GPR 6, and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register and Condition Register Field 0 to reflect the result of the operation:
```
# Assume GPR 4 contains 0x8000 0000.
# Assume GPR 10 contains 0x8000 7000.
addco. 6,4,10
# GPR 6 now contains 0x0000 7000.
```

Related Information

Fixed-Point Processor .

Fixed-Point Arithmetic Instructions .