Load a fullword of data from storage into the low-order 32 bits of the specified general purpose register. Sign extend the data into the high-order 32 bits of the register.
Bits | Value |
---|---|
0-5 | 58 |
6-10 | D |
11-15 | A |
16-29 | ds |
30-31 | 10 |
POWER family | |
---|---|
lwa | RT, D (RA) |
The fullword in storage located at the effective address (EA) is loaded into the low-order 32 bits of the target general purpose register (GRP) RT. The value is then sign-extended to fill the high-order 32 bits of the register.
If GRP RA is not 0, the EA is the sum of the contents of GRP RA and B; otherwise, the EA is equal to the contents of RB.
This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.