The branch processor has three 32-bit registers that are related to nonprivileged instructions:
These registers are 32-bit registers. The PowerPC architecture supports both 32- and 64-bit implementations.
For both POWER family and PowerPC, the branch processor instructions include the branch instructions, Condition Register field and logical instructions, and the system call instructions for PowerPC or the supervisor linkage instructions for POWER family.
Use branch instructions to change the sequence of instruction execution.
Since all branch instructions are on word boundaries, the processor performing the branch ignores bits 30 and 31 of the generated branch target address. All branch instructions can be used in unprivileged state.
A branch instruction computes the target address in one of four ways:
Using the first two of these methods, the target address can be computed sufficiently ahead of the branch instructions to prefetch instructions along the target path.
Using the third and fourth methods, prefetching instructions along the branch path is also possible provided the Link Register or the Count Register is loaded sufficiently ahead of the branch instruction.
The branch instructions include Branch Unconditional and Branch Conditional. In the various target forms, branch instructions generally either branch unconditionally only, branch unconditionally and provide a return address, branch conditionally only, or branch conditionally and provide a return address. If a branch instruction has the Link bit set to 1, then the Link Register is altered to store the return address for use by an invoked subroutine. The return address is the address of the instruction immediately following the branch instruction.
The assembler supports various extended mnemonics for branch instructions that incorporate the BO field only or the BO field and a partial BI field into the mnemonics. See Extended Mnemonics of Branch Instructions for more information.
The PowerPC system call instructions are called supervisor call instructions in POWER family. Both types of instructions generate an interrupt for the system to perform a service. The system call and supervisor call instructions are:
For more information about how these instructions are different, see Functional Differences for POWER family and PowerPC Instructions.
The condition register instructions copy one CR field to another CR field or perform logical operations on CR bits. The assembler supports several extended mnemonics for the Condition Register instructions. See Extended Mnemonics of Condition Register Logical Instructions for information on extended mnemonics for condition register instructions.
POWER family and PowerPC Architecture Overview.