Stores a word of data from a general-purpose register into a specified location in memory and possibly places the address in another general-purpose register.
Bits | Value |
---|---|
0-5 | 37 |
6-10 | RS |
11-15 | RA |
16-31 | D |
PowerPC | |
---|---|
stwu | RS, D( RA) |
POWER family | |
---|---|
stu | RS, D( RA) |
The stwu and stu instructions store the contents of general-purpose register (GPR) RS into the word of storage addressed by the effective address (EA).
If GPR RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit signed two's complement integer sign-extended to 32 bits. If GPR RA is 0, then the EA is D.
If GPR RA is not 0 and the storage access does not cause an Alignment Interrupt or a Data Storage Interrupt, then EA is placed into GPR RA.
The stwu and stu instructions have one syntax form and do not affect the Fixed-Point Exception Register or Condition Register Field 0.
The following code stores the contents of GPR 6 into a location in memory:
.csect data[rw] buffer: .long 0 # Assume GPR 4 contains the address of csect data[rw]. # Assume GPR 6 contains 0x9000 3000. .csect text[pr] stwu 6,buffer(4) # buffer now contains 0x9000 3000. # GPR 4 contains the address of buffer.
Fixed-Point Load and Store with Update Instructions .