[ Bottom of Page | Previous Page | Next Page | Contents | Index | Library Home | Legal | Search ]

Assembler Language Reference

rrib (Rotate Right and Insert Bit) Instruction

Purpose

Rotates bit 0 in a general-purpose register to the right by the number of bits specified by another general-purpose register and stores the rotated bit in a third general-purpose register.

Note: The rrib instruction is supported only in the POWER family architecture.

Syntax

Bits Value
0-5 31
6-10 RS
11-15 RA
16-20 RB
21-30 537
31 Rc
POWER family 
rrib RA, RS, RB
rrib. RA, RS, RB

Description

The rrib instruction rotates bit 0 of the source general-purpose register (GPR) RS to the right by the number of bits specified by bits 27-31 of GPR RB and then stores the rotated bit in GPR RA.

The rrib instruction has two syntax forms. Each syntax form has a different effect on Condition Register Field 0.

Syntax Form Overflow Exception (OE) Fixed-Point Exception Register Record Bit (Rc) Condition Register Field 0
rrib None None 0 None
rrib. None None 1 LT,GT,EQ,SO

The two syntax forms of the rrib instruction never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RA Specifies target general-purpose register where result of operation is stored.
RS Specifies source general-purpose register for operation.
RB Specifies general-purpose register that contains the number of bits for rotation of data.

Examples

  1. The following code rotates bit 0 of GPR 5 to the right by 4 bits and stores its value in GPR 4:

    # Assume GPR 5 contains 0x0000 0000.
    # Assume GPR 6 contains 0x0000 0004.
    # Assume GPR 4 contains 0xFFFF FFFF.
    rrib 4,5,6
    # GPR 4 now contains 0xF7FF FFFF.
  2. The following code rotates bit 0 of GPR 5 to the right by 4 bits, stores its value in GPR 4, and sets Condition Register Field 0 to reflect the result of the operation:

    # Assume GPR 5 contains 0xB004 3000.
    # Assume GPR 6 contains 0x0000 0004.
    # Assume GPR 4 contains 0x0000 0000.
    rrib. 4,5,6
    # GPR 4 now contains 0x0800 0000.

Related Information

Fixed-Point Processor .

Fixed-Point Rotate and Shift Instructions .

[ Top of Page | Previous Page | Next Page | Contents | Index | Library Home | Legal | Search ]