Reinitializes the Machine State Register and continues processing after an interrupt.
| Bits | Value |
|---|---|
| 0-5 | 19 |
| 6-10 | /// |
| 11-15 | /// |
| 16-20 | /// |
| 21-30 | 50 |
| 31 | / |
rfi
The rfi instruction places bits 16-31 of Save Restore Register1 (SRR1) into bits 16-31 of the Machine State Register (MSR), and then begins fetching and processing instructions at the address contained inSave Restore Register0 (SRR0), using the new MSR value.
If the Link bit (LK) is set to 1, the contents of the Link Register are undefined.
The rfi instruction has one syntax form and does not affect Condition Register Field 0 or the Fixed-Point Exception Register.
The rfi instruction is privileged and synchronizing.