Assembler Language Reference

lq (Load Quad Word) Instruction

Purpose

Load a quad-word of data into the specified general purpose register.

Note

This instruction should only be used on 64-bit PowerPC processors running a 64-bit application.

Syntax

Bits	Value
0-5	56
6-10	RT
11-15	RA
16-27	DQ
28-31	PT

PowerPC 64
lq	RT, DQ(RA), PT

Description

The lq instruction loads a quad word in storage from a specified location in memory addressed by the effective address (EA) into the target general-purpose registers (GPRs) RT and RT+1.

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and DQ, a 12-bit, signed two's complement integer, which is concatenated on the right by 0b0000 and sign extended to 64 bits. If GPR RA is 0, then the EA is DQ.

Parameters

RT	Specifies target general-purpose register where result of operation is stored. If RT is odd, the instruction form is invalid.
DQ	Specifies a 12-bit, signed two's complement integer, concatenated on the right with 0b0000, and sign-extended to 64 bits for EA calculation.
RA	Specifies source general-purpose register for EA calculation.
PT	Specifies a 4-bit unsigned immediate value.

Implementation

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.

Related Information

Fixed-Point Processor.

Fixed-Point Load and Store Instructions.