Assembler Language Reference

lfdu (Load Floating-Point Double with Update) Instruction

Purpose

Loads a doubleword of data from a specified location in memory into a floating-point register and possibly places the specified address in a general-purpose register.

Syntax

Bits	Value
0-5	51
6-10	FRT
11-15	RA
16-31	D

lfdu	FRT, D( RA)

Description

The lfdu instruction loads a doubleword in storage from a specified location in memory addressed by the effective address (EA) into the target floating-point register (FPR) FRT.

If RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit, signed two's complement integer sign-extended to 32 bits. If RA is 0, then the effective address (EA) is D.

If RA does not equal 0, and the storage access does not cause an Alignment interrupt or a Data Storage interrupt, then the effective address is stored in GPR RA.

The lfdu instruction has one syntax form and does not affect the Floating-Point Status and Control Register or Condition Register Field 0.

Parameters

FRT	Specifies target general-purpose register where result of operation is stored.
D	Specifies a 16-bit, signed two's complement integer sign-extended to 32 bits for EA calculation.
RA	Specifies source general-purpose register for EA calculation and possible address update.

Examples

The following code loads a doubleword from memory into FPR 6 and stores the address in GPR 5:

.csect data[rw]
storage: .double 0x1
# Assume GPR 5 contains the address of csect data[rw].
.csect text[pr]
lfdu 6,storage(5)
# FPR 6 now contains 0x3FF0 0000 0000 0000.
# GPR 5 now contains the storage address.

Related Information

Floating-Point Processor .

Floating-Point Load and Store Instructions .