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Assembler Language Reference

doz (Difference or Zero) Instruction

Purpose

Computes the difference between the contents of two general-purpose registers and stores the result or the value zero in a general-purpose register.

Note: The doz instruction is supported only in the POWER family architecture.

Syntax

Bits Value
0-5 31
6-10 RT
11-15 RA
16-20 RB
21 OE
22-30 264
31 Rc
POWER family 
doz RT, RA, RB
doz. RT, RA, RB
dozo RT, RA, RB
dozo. RT, RA, RB

Description

The doz instruction adds the complement of the contents of general-purpose register (GPR) RA, 1, and the contents of GPR RB, and stores the result in the target GPR RT.

If the value in GPR RA is algebraically greater than the value in GPR RB, then GPR RT is set to 0.

The doz instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

Syntax Form Overflow Exception (OE) Fixed-Point Exception Register Record Bit (Rc) Condition Register Field 0
doz 0 None 0 None
doz. 0 None 1 LT,GT,EQ,SO
dozo 1 SO,OV 0 None
dozo. 1 SO,OV 1 LT,GT,EQ,SO

The four syntax forms of the doz instruction never affect the Carry bit (CA) in the Fixed-Point Exception Register. If the syntax form sets the Overflow Exception (OE) bit to 1, the instruction affects the Summary Overflow (SO) and Overflow (OV) bits in the Fixed-Point Exception Register; the Overflow (OV) bit can only be set on positive overflows. If the syntax form sets the Record (Rc) bit to 1, the instruction effects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RT Specifies target general-purpose register where result of operation is stored.
RA Specifies source general-purpose register for operation.
RB Specifies source general-purpose register for operation.

Examples

  1. The following code determines the difference between the contents of GPR 4 and GPR 6 and stores the result in GPR 4:

    # Assume GPR 4 holds 0x0000 0001. 
    # Assume GPR 6 holds 0x0000 0002.
    doz 4,4,6
    # GPR 4 now holds 0x0000 0001.
  2. The following code determines the difference between the contents of GPR 4 and GPR 6, stores the result in GPR 4, and sets Condition Register Field 0 to reflect the result of the operation:

    # Assume GPR 4 holds 0x0000 0001.
    # Assume GPR 6 holds 0x0000 0000.
    doz. 4,4,6
    # GPR 4 now holds 0x0000 0000.
  3. The following code determines the difference between the contents of GPR 4 and GPR 6, stores the result in GPR 4, and sets the Summary Overflow and Overflow bits in the Fixed-Point Exception Register to reflect the result of the operation:

    # Assume GPR 4 holds 0x0000 0002.
    # Assume GPR 6 holds 0x0000 0008.
    dozo 4,4,6
    # GPR 4 now holds 0x0000 0006.
  4. The following code determines the difference between the contents of GPR 4 and GPR 6, stores the result in GPR 4, and sets the Summary Overflow and Overflow bits in the Fixed-Point Exception Register and Condition Register Field 0 to reflect the result of the operation:

    # Assume GPR 4 holds 0xEFFF FFFF.
    # Assume GPR 6 holds 0x0000 0000.
    dozo. 4,4,6
    # GPR 4 now holds 0x1000 0001.

Related Information

Fixed-Point Processor .

Fixed-Point Arithmetic Instructions .

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