Calls the system to provide a service.
| Bits | Value |
|---|---|
| 0-5 | 17 |
| 6-10 | /// |
| 11-15 | /// |
| 16-19 | /// |
| 20-26 | LEV |
| 27-29 | /// |
| 30 | 1 |
| 31 | / |
PowerPC
| sc | LEV |
The sc instruction causes a system call interrupt. The effective address (EA) of the instruction following the sc instruction is placed into the Save Restore Register 0 (SRR0). Bits 0, 5-9, and 16-31 of the Machine State Register (MSR) are placed into the corresponding bits of Save Restore Register 1 (SRR1). Bits 1-4 and 10-15 of SRR1 are set to undefined values.
The sc instruction serves as both a basic and an extended mnemonic. In the extended form, the LEV field is omitted and assumed to be 0.
The sc instruction has one syntax form. The syntax form does not affect the Machine State Register.
| LEV | Must be 0 or 1. |
svc (Supervisor Call) Instruction.
Functional Differences for POWER family and PowerPC Instructions