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Assembler Language Reference

stfsux (Store Floating-Point Single with Update Indexed) Instruction

Purpose

Stores a word of data from a floating-point register into a specified location in memory and possibly places the address in a general-purpose register.

Syntax

Bits Value
0-5 31
6-10 FRS
11-15 RA
16-20 RB
21-30 695
31 /
stfsux FRS, RA, RB

Description

The stfsux instruction converts the contents of floating-point register (FPR) FRS to single-precision and stores the result into the word of storage addressed by the effective address (EA).

If general-purpose register (GPR) RA is not 0, the EA is the sum of the contents of GPR RA and GPR RB. If GPR RA is 0, then the EA is the contents of GPR RB.

If GPR RA does not equal 0 and the storage access does not cause Alignment Interrupt or Data Storage Interrupt, then the EA is stored in GPR RA.

The stfsux instruction has one syntax form and does not affect the Floating-Point Status and Control Register or Condition Register Field 0.

Parameters

FRS Specifies floating-point register of stored data.
RA Specifies source general-purpose register for EA calculation and possible address update.
RB Specifies source general-purpose register for EA calculation.

Examples

The following code stores the single-precision contents of FPR 6 into a location in memory and stores the address in GPR 5:

.csect data[rw]
buffer: .long 0,0,0,0
# Assume GPR 4 contains 0x0000 0008.
# Assume GPR 5 contains the address of buffer.
# Assume FPR 6 contains 0x4865 6C6C 6F20 776F.
.csect text[pr]
stfsux 6,5,4
# GPR 5 now contains the address of buffer+8.
# buffer+8 contains 0x432B 6363.

Related Information

Floating-Point Processor .

Floating-Point Load and Store Instructions .

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