Assembler Language Reference

sliq (Shift Left Immediate with MQ) Instruction

Purpose

Shifts the contents of a general-purpose register to the left by a specified number of bits in an immediate value, and places the rotated contents in the MQ Register and the result in another general-purpose register.

Note: The sliq instruction is supported only in the POWER family architecture.

Syntax

Bits	Value
0-5	31
6-10	RS
11-15	RA
16-20	SH
21-30	184
31	Rc

POWER family
sliq	RA, RS, SH
sliq.	RA, RS, SH

Description

The sliq instruction rotates the contents of the source general-purpose register (GPR) RS to the left by N bits, where N is the shift amount specified by SH. The instruction stores the rotated word in the MQ Register and the logical AND of the rotated word and places the generated mask in GPR RA. The mask consists of 32 minus N ones followed by N zeros.

The sliq instruction has two syntax forms. Each syntax form has a different effect on Condition Register Field 0.

Syntax Form	Overflow Exception (OE)	Fixed-Point Exception Register	Record Bit (Rc)	Condition Register Field 0
sliq	None	None	0	None
sliq.	None	None	1	LT,GT,EQ,SO

The two syntax forms of the sliq instruction never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RA	Specifies target general-purpose register where result of operation is stored.
RS	Specifies source general-purpose register for operation.
SH	Specifies immediate value for shift amount.

Examples

The following code rotates the contents of GPR 4 to the left by 20 bits, ANDs the rotated data with a generated mask, and places the rotated word into the MQ Register and the result in GPR 6:
```
# Assume GPR 4 contains 0x1234 5678.
sliq 6,4,0x14
# GPR 6 now contains 0x6780 0000.
# MQ Register now contains 0x6781 2345.
```

The following code rotates the contents of GPR 4 to the left by 16 bits, ANDs the rotated data with a generated mask, places the rotated word into the MQ Register and the result in GPR 6, and sets Condition Register Field 0 to reflect the result of the operation:
```
# Assume GPR 4 contains 0x1234 5678.
sliq. 6,4,0x10
# GPR 6 now contains 0x5678 0000.
# The MQ Register now contains 0x5678 1234.
# Condition Register Field 0 now contains 0x4.
```

Related Information

Fixed-Point Processor .

Fixed-Point Rotate and Shift Instructions .