Assembler Language Reference

extsh or exts (Extend Sign Halfword) Instruction

Purpose

Extends the lower 16-bit contents of a general-purpose register.

Syntax

Bits	Value
0-5	31
6-10	RS
11-15	RA
16-20	///
21	OE
22-30	922
31	Rc

PowerPC
extsh	RA, RS
extsh.	RA, RS

POWER family
exts	RA, RS
exts.	RA, RS

Description

The extsh and exts instructions place bits 16-31 of general-purpose register (GPR) RS into bits 16-31 of GPR RA and copy bit 16 of GPR RS in bits 0-15 of GPR RA.

The extsh and exts instructions each have two syntax forms. Each syntax form has a different effect on Condition Register Field 0.

Syntax Form	Overflow Exception (OE)	Fixed-Point Exception Register	Record Bit (Rc)	Condition Register Field 0
extsh	None	None	0	None
extsh.	None	None	1	LT,GT,EQ,SO
exts	None	None	0	None
exts.	None	None	1	LT,GT,EQ,SO

The two syntax forms of the extsh instruction, and the two syntax forms of the extsh instruction, never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RA	Specifies general-purpose register receives extended integer.
RS	Specifies source general-purpose register for operation.

Examples

The following code places bits 16-31 of GPR 6 into bits 16-31 of GPR 4 and copies bit 16 of GPR 6 into bits 0-15 of GPR 4:
```
# Assume GPR 6 holds 0x0000 FFFF.
extsh 4,6
# GPR 6 now holds 0xFFFF FFFF.
```

The following code places bits 16-31 of GPR 6 into bits 16-31 of GPR 4, copies bit 16 of GPR 6 into bits 0-15 of GPR 4, and sets Condition Register Field 0 to reflect the result of the operation:
```
# Assume GPR 4 holds 0x0000 2FFF.
extsh. 6,4
# GPR 6 now holds 0x0000 2FFF.
```

Related Information

Fixed-Point Processor .

Fixed-Point Logical Instructions .