Logically ANDs the contents of a general-purpose register with an immediate value.
| Bits | Value |
|---|---|
| 0-5 | 28 |
| 6-10 | RS |
| 11-15 | RA |
| 16-31 | UI |
| PowerPC | |
|---|---|
| andi. | RA, RS, UI |
| POWER family | |
|---|---|
| andil. | RA, RS, UI |
The andi. and andil. instructions logically AND the contents of general-purpose register (GPR) RS with the concatenation of x'0000' and a 16-bit unsigned integer, UI, and place the result in GPR RA.
The andi. and andil. instructions have one syntax form and never affect the Fixed-Point Exception Register. The andi. and andil. instructions copies the Summary Overflow (SO) bit from the Fixed-Point Exception Register into Condition Register Field 0 and sets one of the Less Than (LT), Greater Than (GT), or Equal To (EQ) bits of Condition Register Field 0.
| RA | Specifies target general-purpose register where result of operation is stored. |
| RS | Specifies source general-purpose register for operation. |
| UI | Specifies 16-bit unsigned integer for operation. |
The following code logically ANDs the contents of GPR 4 with 0x0000 5730, stores the result in GPR 6, and sets Condition Register Field 0 to reflect the result of the operation:
# Assume GPR 4 contains 0x7B41 92C0. andi. 6,4,0x5730 # GPR 6 now contains 0x0000 1200. # CRF 0 now contains 0x4.
Fixed-Point Logical Instructions .