Assembler Language Reference

Appendix B. Instruction Set Sorted by Mnemonic

In the Instruction Set Sorted by Mnemonic table the Implementation column contains the following information:

Implementation	Description
com	Supported by POWER family, POWER2, and PowerPC implementations.
POWER family	Supported only by POWER family and POWER2 implementations.
POWER2	Supported only by POWER2 implementations.
PowerPC	Supported only by PowerPC architecture.
PPC opt.	Defined only in PowerPC architecture and is an optional instruction.
603 only	Supported only on the PowerPC 603 RISC Microprocessor

Instruction Set Sorted by Mnemonic
Mnemonic	Instruction	Implementation	Format	Primary Op Code	Extended Op Code
a[o][.]	Add Carrying	POWER family	XO	31	10
abs[o][.]	Absolute	POWER family	XO	31	360
add[o][.]	Add	PowerPC	XO	31	266
addc[o][.]	Add Carrying	PowerPC	XO	31	10
adde[o][.]	Add Extended	PowerPC	XO	31	138
addi	Add Immediate	PowerPC	D	14
addic	Add Immediate Carrying	PowerPC	D	12
addic.	Add Immediate Carrying and Record	PowerPC	D	13
addis	Add Immediate Shifted	PowerPC	D	15
addme[o][.]	Add to Minus One Extended	PowerPC	XO	31	234
addze[o][.]	Add to Zero Extended	PowerPC	XO	31	202
ae[o][.]	Add Extended	POWER family	XO	31	138
ai	Add Immediate	POWER family	D	12
ai.	Add Immediate and Record	POWER family	D	13
ame[o][.]	Add to Minus One Extended	POWER family	XO	31	234
and[.]	AND	com	X	31	28
andc[.]	AND with Complement	com	X	31	60
andi.	AND Immediate	PowerPC	D	28
andil.	AND Immediate Lower	POWER family	D	28
andis.	AND Immediate Shifted	PowerPC	D	29
andiu.	AND Immediate Upper	POWER family	D	29
aze[o][.]	Add to Zero Extended	POWER family	XO	31	202
b[l][a]	Branch	com	I	18
bc[l][a]	Branch Conditional	com	B	16
bcc[l]	Branch Conditional to Count Register	POWER family	XL	19	528
bcctr[l]	Branch Conditional to Count Register	PowerPC	XL	19	528
bclr[l]	Branch Conditional Link Register	PowerPC	XL	19	16
bcr[l]	Branch Conditional Register	POWER family	XL	19	16
cal	Compute Address Lower	POWER family	D	14
cau	Compute Address Upper	POWER family	D	15
cax[o][.]	Compute Address	POWER family	XO	31	266
clcs	Cache Line Compute Size	POWER family	X	31	531
clf	Cache Line Flush	POWER family	X	31	118
cli	Cache Line Invalidate	POWER family	X	31	502
cmp	Compare	com	X	31	0
cmpi	Compare Immediate	com	D	11
cmpl	Compare Logical	com	X	31	32
cmpli	Compare Logical Immediate	com	D	10
cntlz[.]	Count Leading Zeros	POWER family	X	31	26
cntlzw[.]	Count Leading Zeros Word	PowerPC	X	31	26
crand	Condition Register AND	com	XL	19	257
crandc	Condition Register AND with Complement	com	XL	19	129
creqv	Condition Register Equivalent	com	XL	19	289
crnand	Condition Register NAND	com	XL	19	225
crnor	Condition Register NOR	com	XL	19	33
cror	Condition Register OR	com	XL	19	449
crorc	Condition Register OR with Complement	com	XL	19	417
crxor	Condition Register XOR	com	XL	19	193
dcbf	Data Cache Block Flush	PowerPC	X	31	86
dcbi	Data Cache Block Invalidate	PowerPC	X	31	470
dcbst	Data Cache Block Store	PowerPC	X	31	54
dcbt	Data Cache Block Touch	PowerPC	X	31	278
dcbtst	Data Cache Block Touch for Store	PowerPC	X	31	246
dcbz	Data Cache Block Set to Zero	PowerPC	X	31	1014
dclst	Data Cache Line Store	POWER family	X	31	630
dclz	Data Cache Line Set to Zero	POWER family	X	31	1014
dcs	Data Cache Synchronize	POWER family	X	31	598
div[o][.]	Divide	POWER family	XO	31	331
divs[o][.]	Divide Short	POWER family	XO	31	363
divw[o][.]	Divide Word	PowerPC	XO	31	491
divwu[o][.]	Divide Word Unsigned	PowerPC	XO	31	459
doz[o][.]	Difference or Zero	POWER family	XO	31	264
dozi	Difference or Zero Immediate	POWER family	D	09
eciwx	External Control in Word Indexed	PPC opt.	X	31	310
ecowx	External Control out Word Indexed	PPC opt.	X	31	438
eieio	Enforce In-order Execution of I/O	PowerPC	X	31	854
eqv[.]	Equivalent	com	X	31	284
exts[.]	Extend Sign	POWER family	X	31	922
extsb[.]	Extend Sign Byte	PowerPC	X	31	954
extsh[.]	Extend Sign Halfword	PowerPC	XO	31	922
fa[.]	Floating Add	POWER family	A	63	21
fabs[.]	Floating Absolute Value	com	X	63	264
fadd[.]	Floating Add	PowerPC	A	63	21
fadds[.]	Floating Add Single	PowerPC	A	59	21
fcir[.]	Floating Convert to Integer Word	POWER family	X	63	14
fcirz[.]	Floating Convert to Integer Word with Round to Zero	POWER family	X	63	15
fcmpo	Floating Compare Ordered	com	X	63	32
fcmpu	Floating Compare Unordered	com	XL	63	0
fctiw[.]	Floating Convert to Integer Word	PowerPC	X	63	14
fctiwz[.]	Floating Convert to Integer Word with Round to Zero	PowerPC	XL	63	15
fd[.]	Floating Divide	POWER family	A	63	18
fdiv[.]	Floating Divide	PowerPC	A	63	18
fdivs[.]	Floating Divide Single	PowerPC	A	59	18
fm[.]	Floating Multiply	POWER family	A	63	25
fma[.]	Floating Multiply-Add	POWER family	A	63	29
fmadd[.]	Floating Multiply-Add	PowerPC	A	63	29
fmadds[.]	Floating Multiply-Add Single	PowerPC	A	59	29
fmr[.]	Floating Move Register	com	X	63	72
fms[.]	Floating Multiply-Subtract	POWER family	A	63	28
fmsub[.]	Floating Multiply-Subtract	PowerPC	A	63	28
fmsubs[.]	Floating Multiply-Subtract Single	PowerPC	A	59	28
fmul[.]	Floating Multiply	PowerPC	A	63	25
fmuls[.]	Floating Multiply Single	PowerPC	A	59	25
fnabs[.]	Floating Negative Absolute Value	com	X	63	136
fneg[.]	Floating Negate	com	X	63	40
fnma[.]	Floating Negative Multiply-Add	POWER family	A	63	31
fnmadd[.]	Floating Negative Multiply-Add	PowerPC	A	63	31
fnmadds[.]	Floating Negative Multiply-Add Single	PowerPC	A	59	31
fnms[.]	Floating Negative Multiply-Subtract	POWER family	A	63	30
fnmsub[.]	Floating Negative Multiply-Subtract	PowerPC	A	63	30
fnmsubs[.]	Floating Negative Multiply-Subtract Single	PowerPC	A	59	30
fres[.]	Floating Reciprocal Estimate Single	PPC opt.	A	59	24
frsp[.]	Floating Round to Single Precision	com	X	63	12
frsqrte[.]	Floating Reciprocal Square Root Estimate	PPC opt.	A	63	26
fs[.]	Floating Subtract	POWER family	A	63	20
fsel[.]	Floating-Point Select	PPC opt.	A	63	23
fsqrt[.]	Floating Square Root	POWER2	A	63	22
fsub[.]	Floating Subtract	PowerPC	A	63	20
fsubs[.]	Floating Subtract Single	PowerPC	A	59	20
icbi	Instruction Cache Block Invalidate	PowerPC	X	31	982
ics	Instruction Cache Synchronize	POWER family	X	19	150
isync	Instruction Synchronize	PowerPC	X	19	150
l	Load	POWER family	D	32
lbrx	Load Byte-Reversed Indexed	POWER family	X	31	534
lbz	Load Byte and Zero	com	D	34
lbzu	Load Byte and Zero with Update	com	D	35
lbzux	Load Byte and Zero with Update Indexed	com	X	31	119
lbzx	Load Byte and Zero Indexed	com	X	31	87
lfd	Load Floating-Point Double	com	D	50
lfdu	Load Floating-Point Double with Update	com	D	51
lfdux	Load Floating-Point Double with Update Indexed	com	X	31	631
lfdx	Load Floating-Point Double Indexed	com	X	31	599
lfq	Load Floating-Point Quad	POWER2	D	56
lfqu	Load Floating-Point Quad with Update	POWER2	D	57
lfqux	Load Floating-Point Quad with Update Indexed	POWER2	X	31	823
lfqx	Load Floating-Point Quad Indexed	POWER2	X	31	791
lfs	Load Floating-Point Single	com	D	48
lfsu	Load Floating-Point Single with Update	com	D	49
lfsux	Load Floating-Point Single with Update Indexed	com	X	31	567
lfsx	Load Floating-Point Single Indexed	com	X	31	535
lha	Load Half Algebraic	com	D	42
lhau	Load Half Algebraic with Update	com	D	43
lhaux	Load Half Algebraic with Update Indexed	com	X	31	375
lhax	Load Half Algebraic Indexed	com	X	31	343
lhbrx	Load Half Byte-Reversed Indexed	com	X	31	790
lhz	Load Half and Zero	com	D	40
lhzu	Load Half and Zero with Update	com	D	41
lhzux	Load Half and Zero with Update Indexed	com	X	31	331
lhzx	Load Half and Zero Indexed	com	X	31	279
lm	Load Multiple	POWER family	D	46
lmw	Load Multiple Word	PowerPC	D	46
lscbx	Load String and Compare Byte Indexed	POWER family	X	31	277
lsi	Load String Immediate	POWER family	X	31	597
lswi	Load String Word Immediate	PowerPC	X	31	597
lswx	Load String Word Indexed	PowerPC	X	31	533
lsx	Load String Indexed	POWER family	X	31	533
lu	Load with Update	POWER family	D	33
lux	Load with Update Indexed	POWER family	X	31	55
lwarx	Load Word and Reserve Indexed	PowerPC	X	31	20
lwbrx	Load Word Byte-Reversed Indexed	PowerPC	X	31	534
lwz	Load Word and Zero	PowerPC	D	32
lwzu	Load Word with Zero Update	PowerPC	D	33
lwzux	Load Word and Zero with Update Indexed	PowerPC	X	31	55
lwzx	Load Word and Zero Indexed	PowerPC	X	31	23
lx	Load Indexed	POWER family	X	31	23
maskg[.]	Mask Generate	POWER family	X	31	29
maskir[.]	Mask Insert from Register	POWER family	X	31	541
mcrf	Move Condition Register Field	com	XL	19	0
mcrfs	Move to Condition Register from FPSCR	com	X	63	64
mcrxr	Move to Condition Register from XER	com	X	31	512
mfcr	Move from Condition Register	com	X	31	19
mffs[.]	Move from FPSCR	com	X	63	583
mfmsr	Move from Machine State Register	com	X	31	83
mfspr	Move from Special-Purpose Register	com	X	31	339
mfsr	Move from Segment Register	com	X	31	595
mfsri	Move from Segment Register Indirect	POWER family	X	31	627
mfsrin	Move from Segment Register Indirect	PowerPC	X	31	659
mtcrf	Move to Condition Register Fields	com	XFX	31	144
mtfsb0[.]	Move to FPSCR Bit 0	com	X	63	70
mtfsb1[.]	Move to FPSCR Bit 1	com	X	63	38
mtfsf[.]	Move to FPSCR Fields	com	XFL	63	711
mtfsfi[.]	Move to FPSCR Field Immediate	com	X	63	134
mtmsr	Move to Machine State Register	com	X	31	146
mtspr	Move to Special-Purpose Register	com	X	31	467
mtsr	Move to Segment Register	com	X	31	210
mtsri	Move to Segment Register Indirect	POWER family	X	31	242
mtsrin	Move to Segment Register Indirect	PowerPC	X	31	242
mul[o][.]	Multiply	POWER family	XO	31	107
mulhw[.]	Multiply High Word	PowerPC	XO	31	75
mulhwu[.]	Multiply High Word Unsigned	PowerPC	XO	31	11
muli	Multiply Immediate	POWER family	D	07
mulli	Multiply Low Immediate	PowerPC	D	07
mullw[o][.]	Multiply Low Word	PowerPC	XO	31	235
muls[o][.]	Multiply Short	POWER family	XO	31	235
nabs[o][.]	Negative Absolute	POWER family	XO	31	488
nand[.]	NAND	com	X	31	476
neg[o][.]	Negate	com	XO	31	104
nor[.]	NOR	com	X	31	124
or[.]	OR	com	X	31	444
orc[.]	OR with Complement	com	X	31	412
ori	OR Immediate	PowerPC	D	24
oril	OR Immediate Lower	POWER family	D	24
oris	OR Immediate Shifted	PowerPC	D	25
oriu	OR Immediate Upper	POWER family	D	25
rac[.]	Real Address Compute	POWER family	X	31	818
rfi	Return from Interrupt	com	X	19	50
rfsvc	Return from SVC	POWER family	X	19	82
rlimi[.]	Rotate Left Immediate then Mask Insert	POWER family	M	20
rlinm[.]	Rotate Left Immediate then AND with Mask	POWER family	M	21
rlmi[.]	Rotate Left then Mask Insert	POWER family	M	22
rlnm[.]	Rotate Left then AND with Mask	POWER family	M	23
rlwimi[.]	Rotate Left Word Immediate then Mask Insert	PowerPC	M	20
rlwinm[.]	Rotate Left Word Immediate then AND with Mask	PowerPC	M	21
rlwnm[.]	Rotate Left Word then AND with Mask	PowerPC	M	23
rrib[.]	Rotate Right and Insert Bit	POWER family	X	31	537
sc	System Call	PowerPC	SC	17
sf[o][.]	Subtract from	POWER family	XO	31	08
sfe[o][.]	Subtract from Extended	POWER family	XO	31	136
sfi	Subtract from Immediate	POWER family	D	08
sfme[o][.]	Subtract from Minus One Extended	POWER family	XO	31	232
sfze[o][.]	Subtract from Zero Extended	POWER family	XO	31	200
si	Subtract Immediate	com	D	12
si.	Subtract Immediate and Record	com	D	13
sl[.]	Shift Left	POWER family	X	31	24
sle[.]	Shift Left Extended	POWER family	X	31	153
sleq[.]	Shift Left Extended with MQ	POWER family	X	31	217
sliq[.]	Shift Left Immediate with MQ	POWER family	X	31	184
slliq[.]	Shift Left Long Immediate with MQ	POWER family	X	31	248
sllq[.]	Shift Left Long with MQ	POWER family	X	31	216
slq[.]	Shift Left with MQ	POWER family	X	31	152
slw[.]	Shift Left Word	PowerPC	X	31	24
sr[.]	Shift Right	POWER family	X	31	536
sra[.]	Shift Right Algebraic	POWER family	X	31	792
srai[.]	Shift Right Algebraic Immediate	POWER family	X	31	824
sraiq[.]	Shift Right Algebraic., Immediate with MQ	POWER family	X	31	952
sraq[.]	Shift Right Algebraic with MQ	POWER family	X	31	920
sraw[.]	Shift Right Algebraic Word	PowerPC	X	31	792
srawi[.]	Shift Right Algebraic Word Immediate	PowerPC	X	31	824
sre[.]	Shift Right Extended	POWER family	X	31	665
srea[.]	Shift Right Extended Algebraic	POWER family	X	31	921
sreq[.]	Shift Right Extended with MQ	POWER family	X	31	729
sriq[.]	Shift Right Immediate with MQ	POWER family	X	31	696
srliq[.]	Shift Right Long Immediate with MQ	POWER family	X	31	760
srlq[.]	Shift Right Long with MQ	POWER family	X	31	728
srq[.]	Shift RIght with MQ	POWER family	X	31	664
srw[.]	Shift Right Word	PowerPC	X	31	536
st	Store	POWER family	D	36
stb	Store Byte	com	D	38
stbrx	Store Byte-Reversed Indexed	POWER family	X	31	662
stbu	Store Byte with Update	com	D	39
stbux	Store Byte with Update Indexed	com	X	31	247
stbx	Store Byte Indexed	com	X	31	215
stfd	Store Floating-Point Double	com	D	54
stfdu	Store Floating-Point Double with Update	com	D	55
stfdux	Store Floating-Point Double with Update Indexed	com	X	31	759
stfdx	Store Floating-Point Double Indexed	com	X	31	727
stfiwx	Store Floating-Point as Integer Word Indexed	PPC opt.	X	31	983
stfq	Store Floating-Point Quad	POWER2	DS	60
stfqu	Store Floating-Point Quad with Update	POWER2	DS	61
stfqux	Store Floating-Point Quad with Update Indexed	POWER2	X	31	951
stfqx	Store Floating-Point Quad Indexed	POWER2	X	31	919
stfs	Store Floating-Point Single	com	D	52
stfsu	Store Floating-Point Single with Update	com	D	53
stfsux	Store Floating-Point Single with Update Indexed	com	X	31	695
stfsx	Store Floating-Point Single Indexed	com	X	31	663
sth	Store Half	com	D	44
sthbrx	Store Half Byte-Reverse Indexed	com	X	31	918
sthu	Store Half with Update	com	D	45
sthux	Store Half with Update Indexed	com	X	31	439
sthx	Store Half Indexed	com	X	31	407
stm	Store Multiple	POWER family	D	47
stmw	Store Multiple Word	PowerPC	D	47
stsi	Store String Immediate	POWER family	X	31	725
stswi	Store String Word Immediate	PowerPC	X	31	725
stswx	Store String Word Indexed	PowerPC	X	31	661
stsx	Store String Indexed	POWER family	X	31	661
stu	Store with Update	POWER family	D	37
stux	Store with Update Indexed	POWER family	X	31	183
stw	Store	PowerPC	D	36
stwbrx	Store Word Byte-Reversed Indexed	PowerPC	X	31	662
stwcx.	Store Word Conditional Indexed	PowerPC	X	31	150
stwu	Store Word with Update	PowerPC	D	37
stwux	Store Word with Update Indexed	PowerPC	X	31	183
stwx	Store Word Indexed	PowerPC	X	31	151
stx	Store Indexed	POWER family	X	31	151
subf[o][.]	Subtract from	PowerPC	XO	31	40
subfc[o][.]	Subtract from Carrying	PowerPC	XO	31	08
subfe[o][.]	Subtract from Extended	PowerPC	XO	31	136
subfic	Subtract from Immediate Carrying	PowerPC	D	08
subfme[o][.]	Subtract from Minus One Extended	PowerPC	XO	31	232
subfze[o][.]	Subtract from Zero Extended	PowerPC	XO	31	200
svc[l][a]	Supervisor Call	POWER family	SC	17
sync	Synchronize	PowerPC	X	31	598
t	Trap	POWER family	X	31	04
ti	Trap Immediate	POWER family	D	03
tlbi	Translation Look-aside Buffer Invalidate Entry	POWER family	X	31	306
tlbie	Translation Look-aside Buffer Invalidate Entry	PPC opt.	X	31	306
tlbld	Load Data TLB Entry	603 only	X	31	978
tlbli	Load Instruction TLB Entry	603 only	X	31	1010
tlbsync	Translation Look-aside Buffer Synchronize	PPC opt.	X	31	566
tw	Trap Word	PowerPC	X	31	04
twi	Trap Word Immediate	PowerPC	D	03
xor[.]	XOR	com	X	31	316
xori	XOR Immediate	PowerPC	D	26
xoril	XOR Immediate Lower	POWER family	D	26
xoris	XOR Immediate Shift	PowerPC	D	27
xoriu	XOR Immediate Upper	POWER family	D	27