Assembler Language Reference

ldu (Store Double Word with Update) Instruction

Purpose

Load a double-word of data into the specified general purpose register, updating the address base.

This instruction should only be used on 64-bit PowerPC processors running a 64-bit application.

Syntax

Bits	Value
0-5	58
6-10	D
11-15	A
16-29	ds
30-31	01

PowerPC64
ldu	RT, D(RA)

Description

The ldu instruction loads a double-word in storage from a specified location in memory addressed by the effective address (EA) into the target general-purpose register (GPR) RT.

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit, signed two's complement integer, fullword-aligned, sign-extended to 64 bits.

If RA = 0 or RA = RT, the instruction form is invalid.

Parameters

RT	Specifies target general-purpose register where result of operation is stored.
D	Specifies a 16-bit, signed two's complement integer sign-extended to 32 bits for EA calculation.
RA	Specifies source general-purpose register for EA calculation.

Examples

The following code loads the first of 4 double-words from memory into GPR 4, incrementing GPR 5 to point to the next double-word in memory:

.csect   foodata[rw]
storage: .llong 5,6,7,12  # Successive double-words.

.csect   text[PR]
                          # Assume GPR 5 contains address of csect foodata[RW].
ldu       4,storage(5)    # GPR 4 now contains the first double-word of
                          # foodata; GRP 5 points to the second double-word.

Implementation

This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.

Related Information

Fixed-Point Processor .

Fixed-Point Load and Store with Update Instructions