Assembler Language Reference

sthbrx (Store Half Byte-Reverse Indexed) Instruction

Purpose

Stores a halfword of data from a general-purpose register into a specified location in memory with the two bytes reversed.

Syntax

Bits	Value
0-5	31
6-10	RS
11-15	RA
16-20	RB
21-30	918
31	/

sthbrx

RS, RA, RB

Description

The sthbrx instruction stores bits 16-31 of general-purpose register (GPR) RS into the halfword of storage addressed by the effective address (EA).

Consider the following when using the sthbrx instruction:

Bits 24-31 of GPR RS are stored into bits 00-07 of the halfword in storage addressed by EA.

Bits 16-23 of GPR RS are stored into bits 08-15 of the word in storage addressed by EA.

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and GPR RB. If GPR RA is 0, then the EA is the contents of GPR RB.

The sthbrx instruction has one syntax form and does not affect the Fixed-Point Exception Register or Condition Register Field 0.

Parameters

RS	Specifies source general-purpose register of stored data.
RA	Specifies source general-purpose register for EA calculation.
RB	Specifies source general-purpose register for EA calculation.

Examples

The following code stores the halfword contents of GPR 6 with the bytes reversed into a location in memory:

.csect data[rw]
buffer: .long 0
# Assume GPR 6 contains 0x9000 3456.
# Assume GPR 4 contains the address of buffer.
.csect text[pr]
sthbrx 6,0,4
# buffer now contains 0x5634.

Related Information

Floating-Point Processor .

Floating-Point Load and Store Instructions .