Places the complemented result of ANDing two Condition Register bits in a Condition Register bit.
| Bits | Value |
|---|---|
| 0-5 | 19 |
| 6-10 | BT |
| 11-15 | BA |
| 16-20 | BB |
| 21-30 | 225 |
| 31 | / |
| crnand | BT, BA, BB |
The crnand instruction logically ANDs the Condition Register bit specified by BA and the Condition Register bit specified by BB and places the complemented result in the target Condition Register bit specified by BT.
The crnand instruction has one syntax form and does not affect the Fixed-Point Exception Register.
| BT | Specifies target Condition Register bit where result of operation is stored. |
| BA | Specifies source Condition Register bit for operation. |
| BB | Specifies source Condition Register bit for operation. |
The following code logically ANDs Condition Register bits 8 and 4 and places the complemented result into Condition Register bit 4:
# Assume Condition Register bit 8 is 1. # Assume Condition Register bit 4 is 0. crnand 4,8,4 # Condition Register bit 4 is now 1.
Condition Register Instructions .