Load a fullword of data from storage into the low-order 32b its of the specified general purpose register. Sign extend the data into the high-order 32 bits of the register. Update the address base.
Bits | Value |
---|---|
0-5 | 31 |
6-10 | D |
11-15 | A |
16-20 | B |
21-30 | 373 |
31 | 0 |
POWER family | |
---|---|
lwaux | RT, RA, RB |
The fullword in storage located at the effective address (EA) is loaded into the low-order 32 bits of the target general puspose register (GRP). The value is then sign-extended to fill the high-order 32 bits of the register. The EA is the sum of the contents of GRP RA and GRP RB.
If RA = 0 or RA = RT, the instruction form is invalid.
This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.