Assembler Language Reference

mtfsfi (Move to FPSCR Field Immediate) Instruction

Purpose

Copies an immediate value into a specified Floating-Point Status and Control Register field.

Syntax

Bits	Value
0-5	63
6-8	BF
9-10	//
11-15	///
16-19	U
20	/
21-30	134
31	Rc

mtfsfi	BF, I
mtfsfi.	BF, I

Description

The mtfsfi instruction copies the immediate value specified by the I parameter into the Floating-Point Status and Control Register field specified by BF. None of the other fields of the Floating-Point Status and Control Register are affected.

The mtfsfi instruction has two syntax forms. Each syntax form has a different effect on Condition Register Field 1.

Syntax Form	FPSCR Bits	Record Bit (Rc)	Condition Register Field 1
mtfsfi	None	0	None
mtfsfi.	None	1	FX, FEX, VX, OX

The two syntax forms of the mtfsfi instruction never affect the Floating-Point Status and Control Register fields. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Floating-Point Exception (FX), Floating-Point Enabled Exception (FEX), Floating Invalid Operation Exception (VX), and Floating-Point Overflow Exception (OX) bits in Condition Register Field 1.

Note: When specifying FPSCR 0-3, some bits cannot be explicitly set or reset.

Parameters

BF	Specifies target Floating-Point Status and Control Register field for operation.
I	Specifies source immediate value for operation.

Examples

The following code sets Floating-Point Status and Control Register Field 6 to b'0100':
```
mtfsfi 6,4
# Floating-Point Status and Control Register Field 6
# is now b'0100'.
```

The following code sets Floating-Point Status and Control Register field 0 to b'0100' and sets Condition Register Field 1 to reflect the result of the operation:
```
mtfsfi. 0,1
# Floating-Point Status and Control Register Field 0
# is now b'0001'.
# Condition Register Field 1 now contains 0x1.
```

Related Information

Floating-Point Processor .

Interpreting the Contents of a Floating-Point Register .