[ Previous | Next | Contents | Home | Search ]
AIX Version 4.3 Assembler Language Reference

bclr or bcr (Branch Conditional Link Register) Instruction

Purpose

Conditionally branches to an address contained in the Link Register.

Syntax

PowerPC
bclr BO,BI
bclrl BO,BI
POWER
bcr BO,BI
bcrl BO,BI

See "Extended Mnemonics of Branch Instructions" for more information.

Description

The bclr and bcr instructions branch to an instruction specified by the branch target address. The branch target address is the concatenation of bits 0-29 of the Link Register and b'00'.

The bclr and bcr instructions have two syntax forms. Each syntax form has a different effect on the Link bit and Link Register.

Syntax Form Absolute Address Bit (AA) Fixed-Point Exception Register Link Bit (LK) Condition Register Field 0
bclr None None 0 None
bclrl None None 1 None
bcr None None 0 None
bcrl None None 1 None

The two syntax forms of the bclr and bcr instruction never affect the Fixed-Point Exception Register or Condition Register Field 0. If the Link bit (LK) is 1, then the effective address of the instruction that follows the branch instruction is placed into the Link Register.

The Branch Option field (BO) is used to combine different types of branches into a single instruction. Extended mnemonics are provided to set the Branch Option field automatically.

The encoding for the BO field is defined in PowerPC Architecture. The following list gives brief descriptions of the possible values for this field:

BO Description
0000y Decrement the CTR; then branch if the decremented CTR is not 0 and the condition is False.
0001y Decrement the CTR; then branch if the decremented CTR is 0 and the condition is False.
001zy Branch if the condition is False.
0100y Decrement the CTR; then branch if bits the decremented CTR is not 0 and the condition is True.
0101y Decrement the CTR; then branch if the decremented CTR is 0 and the condition is True.
011zy Branch if the condition is True.
1z00y Decrement the CTR; then branch if the decremented CTR is not 0.
1z01y Decrement the CTR; then branch if the decremented CTR is 0.
1z1zz Branch always.

In the PowerPC Architecture, the z bit denotes a bit that must be 0. If the bit is not 0, the instruction form is invalid.

In the PowerPC Architecture, the y bit provides a hint about whether a conditional branch is likely to be taken. The value of this bit can be either 0 or 1. The default value is 0.

In the POWER Architecture, the z and y bits can be either 0 or 1.

Parameters

BO Specifies Branch Option field.
BI Specifies bit in Condition Register for condition comparison.

Examples

The following code branches to the calculated branch target address dependent on bit 0 of the Condition Register:

bclr 0x0,0
# The Count Register is decremented.
# A branch occurs if the LT bit is set to zero in the
# Condition Register and if the Count Register 
# does not equal zero.
# If the conditions are met, the instruction branches to
# the concatenation of bits 0-29 of the Link Register and b'00'.

Related Information

AIX Assembler Overview.

Branch Processor.

Branch Instructions.


[ Previous | Next | Contents | Home | Search ]