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AIX Version 4.3 Assembler Language Reference

addme or ame (Add to Minus One Extended) Instruction

Purpose

Adds the contents of a general-purpose register, the Carry bit in the Fixed-Point Exception Register, and -1 and places the result in a general-purpose register.

Syntax

PowerPC
addme RT,RA
addme. RT,RA
addmeo RT,RA
addmeo. RT,RA
POWER
ame RT,RA
ame. RT,RA
ameo RT,RA
ameo. RT,RA

Description

The addme and ame instructions place the sum of the contents of general-purpose register (GPR) RA, the Carry bit of the Fixed-Point Exception Register, and -1 (0xFFFF FFFF) into the target GPR RT.

The addme instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

The ame instruction has four syntax forms. Each syntax form has a different effect on Condition Register Field 0 and the Fixed-Point Exception Register.

Syntax Form Overflow Exception (OE) Fixed-Point Exception Register Record Bit (Rc) Condition Register Field 0
addme 0 CA 0 None
addme. 0 CA 1 LT,GT,EQ,SO
addmeo 1 SO,OV,CA 0 None
addmeo. 1 SO,OV,CA 1 LT,GT,EQ,SO
ame 0 CA 0 None
ame. 0 CA 1 LT,GT,EQ,SO
ameo 1 SO,OV,CA 0 None
ameo. 1 SO,OV,CA 1 LT,GT,EQ,SO

The four syntax forms of the addme instruction and the four syntax forms of the ame instruction always affect the Carry bit (CA) in the Fixed-Point Exception Register. If the syntax form sets the Overflow Exception (OE) bit to 1, the instruction affects the Summary Overflow (SO) and Overflow (OV) bits in the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.

Parameters

RT Specifies target general-purpose register where result of operation is stored.
RA Specifies source general-purpose register for operation.

Examples

  1. The following code adds the contents of GPR 4, the Carry bit in the Fixed-Point Exception Register, and -1 and stores the result in GPR 6: 
    # Assume GPR 4 contains 0x9000 3000.
# Assume the Carry bit is zero.
addme 6,4
# GPR 6 now contains 0x9000 2FFF.
  2. The following code adds the contents of GPR 4, the Carry bit in the Fixed-Point Exception Register, and -1; stores the result in GPR 6; and sets Condition Register Field 0 to reflect the result of the operation: 
    # Assume GPR 4 contains 0xB000 42FF.
# Assume the Carry bit is zero.
addme. 6,4
# GPR 6 now contains 0xB000 42FE.
  3. The following code adds the contents of GPR 4, the Carry bit in the Fixed-Point Exception Register, and -1; stores the result in GPR 6; and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register to reflect the result of the operation: 
    # Assume GPR 4 contains 0x8000 0000.
# Assume the Carry bit is zero.
addmeo 6,4
# GPR 6 now contains 0x7FFF FFFF.
  4. The following code adds the contents of GPR 4, the Carry bit in the Fixed-Point Exception Register, and -1; stores the result in GPR 6; and sets the Summary Overflow, Overflow, and Carry bits in the Fixed-Point Exception Register and Condition Register Field 0 to reflect the result of the operation: 
    # Assume GPR 4 contains 0x8000 0000.
# Assume the Carry bit is one.
addmeo. 6,4
# GPR 6 now contains 0x8000 000.

Related Information

Fixed-Point Processor.

Fixed-Point Arithmetic Instructions.

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