The assembler issues errors and warnings if a source program contains instructions that are not in the current assembly mode. Source compatibility of POWER programs is maintained on PowerPC platforms. All POWER user instructions are emulated in PowerPC by the operating system. Because the emulation of instructions is much slower than the execution of hardware-supported instructions, for performance reasons it may be desirable to modify the source program to use hardware-supported instructions.
The "invalid instruction form" problem occurs when restrictions are required in PowerPC but not required in POWER. The assembler checks for invalid instruction form errors, but it cannot check the lswx instruction for these errors. The lswx instruction requires that the registers specified by the second and third operands (RA and RB) are not in the range of registers to be loaded. Since this is determined by the content of the Fixed-Point Exception Register (XER) at run time, the assembler cannot perform an invalid instruction form check for the lswx instruction. At run time, some of these errors may cause a silence failure, while others may cause an interruption. It may be desirable to eliminate these errors. See "Detection of New Error Conditions" for more information on invalid instruction forms.
If the mfspr and mtspr instructions are used, check for proper coding of the special-purpose register (SPR) operand. The assembler requires that the low-order five bits and the high-order five bits of the SPR operand be reversed before they are used as the input operand. POWER and PowerPC have different sets of SPR operands for nonprivileged instructions. Check for the proper encoding of these operands. Five POWER SPRs (TID, SDR0, MQ, RTCU, and RTCL) are dropped from PowerPC, but the MQ, RTCU, and RTCL instructions are emulated in PowerPC. While these instructions can still be used, there is some performance degradation due to the emulation. (AIX has new routines read_real_time and time_base_to_time that can sometimes be used instead of code accessing the real time clock or time base SPRs.)
More information on migrating source programs can be found in the following:
Extended Instruction Mnemonics Overview.
Functional Differences for POWER and PowerPC Instructions.
Differences between POWER and PowerPC Instructions with the Same Op Code.
Extended Mnemonics Changes.
POWER Instructions Deleted from PowerPC.
New PowerPC Instructions.
Instructions Available Only for the PowerPC 601 RISC Microprocessor.