Loads consecutive bytes in storage from a specified location in memory into consecutive general-purpose registers.
The lswx and lsx instructions load N consecutive bytes in storage addressed by the effective address (EA) into general-purpose register (GPR) RT, starting with the leftmost byte, through GPR RT + NR - 1, and wrapping around back through GPR 0 if required.
If GPR RA is not 0, the EA is the sum of the contents of GPR RA and the address stored in GPR RB. If GPR RA is 0, then EA is the contents of GPR RB.
Consider the following when using the lswx and lsx instructions:
For the PowerPC instruction lswx, if RA or RB is in the range of registers to be loaded or RT = RA = 0, the results are boundedly undefined.
Consider the following when using the POWER instruction lsx:
The lswx and lsx instructions have one syntax form which does not affect the Fixed-Point Exception Register or Condition Register Field 0.
Note: The lswx and lsx instructions can be interrupted by a Data Storage interrupt. When such an interrupt occurs, the instruction is restarted from the beginning.
|RT||Specifies starting general-purpose register of stored data.|
|RA||Specifies general-purpose register for EA calculation.|
|RB||Specifies general-purpose register for EA calculation.|
The following code loads the bytes contained in a location in memory addressed by GPR 5 into GPR 6:
# Assume XER25-31 = 4. csect data[rw] storage: .string "Hello, world" # Assume GPR 4 contains the displacement of storage # relative to data[rw]. # Assume GPR 5 contains the address of csect data[rw]. .csect text[pr] lswx 6,5,4 # GPR 6 now contains 0x4865 6c6c.
Fixed-Point String Instructions.
Functional Differences for POWER and PowerPC Instructions.