Inserts the contents of one general-purpose register into another general-purpose register under control of a bit mask.
Note: The maskir instruction is supported only in the POWER architecture.
POWER | |
---|---|
maskir | RA,RS,RB |
maskir. | RA,RS,RB |
The maskir stores the contents of general-purpose register (GPR) RS in GPR RA under control of the bit mask in GPR RB.
The value for each bit in the target GPR RA is determined as follows:
The maskir instruction has two syntax forms. Each syntax form has a different effect on Condition Register Field 0.
Syntax Form | Overflow Exception (OE) | Fixed-Point Exception Register | Record Bit (Rc) | Condition Register Field 0 |
maskir | None | None | 0 | None |
maskir. | None | None | 1 | LT, GT, EQ, SO |
The two syntax forms of the maskir instruction never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.
# Assume GPR 6 (RA) target contains 0xAAAAAAAA. # Assume GPR 4 (RB) mask contains 0x000F0F00. # Assume GPR 5 (RS) source contains 0x55555555. maskir 6,5,4 # GPR 6 (RA) target now contains 0xAAA5A5AA.
# Assume GPR 6 (RA) target contains 0xAAAAAAAA. # Assume GPR 4 (RB) mask contains 0x0A050F00. # Assume GPR 5 (RS) source contains 0x55555555. maskir. 6,5,4 # GPR 6 (RA) target now contains 0xA0AFA5AA.
Fixed-Point Rotate and Shift Instructions.