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AIX Version 4.3 Assembler Language Reference

lhz (Load Half and Zero) Instruction

Purpose

Loads a halfword of data from a specified location in memory into a general-purpose register and sets the remaining 16 bits to 0.

Syntax

lhz RT,D(RA)

Description

The lhz instruction loads a halfword of data from a specified location in memory, addressed by the effective address (EA), into bits 16-31 of the target general-purpose register (GPR) RT and sets bits 0-15 of GPR RT to 0.

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit, signed two's complement integer sign-extended to 32 bits. If GPR RA is 0, then the EA is D.

The lhz instruction has one syntax form and does not affect the Fixed-Point Exception Register or Condition Register Field 0.

Parameters

RT Specifies target general-purpose register where result of operation is stored.
D 16-bit, signed two's complement integer sign-extended to 32 bits for EA calculation.
RA Specifies source general-purpose register for EA calculation.

Examples

The following code loads a halfword of data into bits 16-31 of GPR 6 and sets bits 0-15 of GPR 6 to 0:

.csect data[rw]
storage: .short 0xffff
# Assume GPR 4 holds the address of csect data[rw].
.csect text[pr]
lhz 6,storage(4)
# GPR 6 now holds 0x0000 ffff.

Related Information

Fixed-Point Processor.

Fixed-Point Load and Store Instructions.


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