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AIX Version 4.3 Assembler Language Reference

lhbrx (Load Half Byte-Reverse Indexed) Instruction

Purpose

Loads a byte-reversed halfword of data from a specified location in memory into a general-purpose register and sets the remaining 16 bits of the general-purpose register to zero.

Syntax

lhbrx RT,RA,RB

Description

The lhbrx instruction loads bits 00-07 and bits 08-15 of the halfword in storage addressed by the effective address (EA) into bits 24-31 and bits 16-23 of general-purpose register (GPR) RT, and sets bits 00-15 of GPR RT to 0.

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and GPR RB. If GPR RA is 0, then the EA is the contents of GPR RB.

The lhbrx instruction has one syntax form and does not affect the Fixed-Point Exception Register or Condition Register Field 0.

Parameters

RT Specifies target general-purpose register where result of operation is stored.
RA Specifies source general-purpose register for EA calculation.
RB Specifies source general-purpose register for EA calculation.

Examples

The following code loads bits 00-07 and bits 08-15 of the halfword in storage into bits 24-31 and bits 16-23 of GPR 6, and sets bits 00-15 of GPR 6 to 0:

.csect data[rw]
.short 0x7654
# Assume GPR 4 contains the address of csect data[rw].
# Assume GPR 5 contains the displacement relative
# to data[rw].
.csect text[pr]
lhbrx 6,5,4
# GPR 6 now contains 0x0000 5476.

Related Information

Fixed-Point Processor.

Fixed-Point Load and Store Instructions.


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