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AIX Version 4.3 Assembler Language Reference

sthu (Store Half with Update) Instruction


Stores a halfword of data from a general-purpose register into a specified location in memory and possibly places the address in another general-purpose register.


sthu RS,D(RA)


The sthu instruction stores bits 16-31 of general-purpose register (GPR) RS into the halfword of storage addressed by the effective address (EA).

If GPR RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit signed two's complement integer sign-extended to 32 bits. If GPR RA is 0, then the EA is D.

If GPR RA does not equal 0 and the storage access does not cause an Alignment Interrupt or a Data Storage Interrupt, then the EA is placed into GPR RA.

The sthu instruction has one syntax form and does not affect the Fixed-Point Exception Register or Condition Register Field 0.


RS Specifies source general-purpose register of stored data.
D Specifies a16-bit signed two's complement integer sign-extended to 32 bits for EA calculation.
RA Specifies source general-purpose register for EA calculation and possible address update.


The following code stores the halfword contents of GPR 6 into a memory location and stores the address in GPR 4:

.csect data[rw]
buffer: .long 0
# Assume GPR 6 contains 0x9000 3456.
# Assume GPR 4 contains the address of csect data[rw].
.csect text[pr]
sthu 6,buffer(4)
# buffer now contains 0x3456
# GPR 4 contains the address of buffer.

Related Information

Fixed-Point Processor.

Fixed-Point Load and Store with Update Instructions.

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