Rotates the contents of a general-purpose register to the left by a specified number of bits and places the masked result in another general-purpose register.
PowerPC | |
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slw | RA,RS,RB |
slw. | RA,RS,RB |
POWER | |
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sl | RA,RS,RB |
sl. | RA,RS,RB |
The slw and sl instructions rotate the contents of the source general-purpose register (GPR) RS to the left N bits, where N is the shift amount specified in bits 27-31 of GPR RB, and store the logical AND of the rotated word and the generated mask in GPR RA.
Consider the following when using the slw and sl instructions:
The slw and sl instructions each have two syntax forms. Each syntax form has a different effect on Condition Register Field 0.
Syntax Form | Overflow Exception (OE) | Fixed-Point Exception Register | Record Bit (Rc) | Condition Register Field 0 |
slw | None | None | 0 | None |
slw. | None | None | 1 | LT,GT,EQ,SO |
sl | None | None | 0 | None |
sl. | None | None | 1 | LT,GT,EQ,SO |
The two syntax forms of the slw instruction, and the two syntax forms of the sl instruction, never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, these instructions affect the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.
# Assume GPR 5 contains 0x0000 002F. # Assume GPR 4 contains 0xFFFF FFFF. slw 6,4,5 # GPR 6 now contains 0x0000 0000.
# Assume GPR 4 contains 0xB004 3000. # Assume GPR 5 contains 0x0000 0005. slw. 6,4,5 # GPR 6 now contains 0x0086 0000. # Condition Register Field 0 now contains 0x4.
Fixed-Point Rotate and Shift Instructions.