Loads consecutive words at a specified location into more than one general-purpose register.
The lmw and lm instructions load N consecutive words starting at the calculated effective address (EA) into a number of general-purpose registers (GPR), starting at GPR RT and filling all GPRs through GPR 31. N is equal to 32-RT field, the total number of consecutive words that are placed in consecutive registers.
If GPR RA is not 0, the EA is the sum of the contents of GPR RA and D. If GPR RA is 0, then the EA is D.
Consider the following when using the PowerPC instruction lmw:
For the POWER instruction lm, if GPR RA is not equal to 0 and GPR RA is in the range to be loaded, then GPR RA is not written to. The data that would have normally been written into RA is discarded and the operation continues normally.
The lmw and lm instructions have one syntax and do not affect the Fixed-Point Exception Register or Condition Register Field 0.
Note: The lmw and lm instructions are interruptible due to a data storage interrupt. When such an interrupt occurs, the instruction should be restarted from the beginning.
|RT||Specifies starting target general-purpose register for operation.|
|D||Specifies a 16-bit signed two's complement integer sign extended to 32 bits for EA calculation|
|RA||Specifies source general-purpose register for EA calculation.|
The following code loads data into GPR 29 and GPR 31:
.csect data[rw] .long 0x8971 .long -1 .long 0x7ffe c100 # Assume GPR 30 contains the address of csect data[rw]. .csect text[pr] lmw 29,0(30) # GPR 29 now contains 0x0000 8971. # GPR 30 now contains the address of csect data[rw]. # GPR 31 now contains 0x7ffe c100.
Fixed-Point Load and Store Instructions.