A set of extended mnemonics are provided for extract, insert, rotate, shift, clear, and clear left and shift left operations. This article discusses the following:
The alternative input format is applied to the following POWER and PowerPC instructions.
POWERPowerPC | |
---|---|
rlimi[.] | rlwimi[.] |
rlinm[.] | rlwinm[.] |
rlnm[.] | rlwnm[.] |
rlmi[.] | Not applicable |
Five operands are normally required for these instructions. These operands are:
MB indicates the first bit with a value of 1 in the mask, and ME indicates the last bit with a value of 1 in the mask. The assembler supports the following operand format.
RA, RS, SH, BM
BM is the mask itself. The assembler generates the MB and ME operands from the BM operand for the instructions. The assembler checks the BM operand first. If an invalid BM is entered, error 78 is reported.
A valid mask is defined as a single series (one or more) of bits with a value of 1 surrounded by zero or more bits with a value of z0. A mask of all bits with a value of 0 may not be specified.
The following table shows examples of valid 32-bit masks.
0 15 31 | | | ----------------------------------------------------------- MB = 0 ME = 31 11111111111111111111111111111111 MB = 0 ME = 0 10000000000000000000000000000000 MB = 0 ME = 22 11111111111111111111110000000000 MB = 12 ME = 25 00000000000111111111111110000000 ----------------------------------------------------------- MB = 22 ME = 31 00000000000000000000011111111111 MB = 29 ME = 6 11111110000000000000000000000111
The following table shows examples of 32-bit masks that are not valid.
0 15 31 | | | 00000000000000000000000000000000 01010101010101010101010101010101 00000000000011110000011000000000 11111100000111111111111111000000
The extended mnemonics for the rotate and shift instructions are in the POWER and PowerPC intersection area (com assembly mode). A set of rotate and shift extended mnemonics provide for the following operations:
The rotate and shift extended mnemonics are shown in the following table. The N operand specifies the number of bits to be extracted, inserted, rotated, or shifted. Because expressions are introduced when the extended mnemonics are mapped to the base mnemonics, certain restrictions are imposed to prevent the result of the expression from causing an overflow in the SH, MB, or ME operand.
To maintain compatibility with previous versions of AIX, n is not restricted to a value of 0. If n is 0, the assembler treats 32-n as a value of 0.
32-bit Rotate and Shift Extended Mnemonics for PowerPC | |||
Operation | Extended Mnemonic | Equivalent to | Restrictions |
Extract and left justify immediate | extlwi RA, RS, n, b | rlwinm RA, RS, b, 0, n-1 | 32 > n > 0 |
Extract and right justify immediate | extrwi RA, RS, n, b | rlwinm RA, RS, b+n, 32-n, 31 | 32 > n > 0 & b+n =< 32 |
Insert from left immediate | inslwi RA, RS, n, b | rlwinm RA, RS, 32-b, b, (b+n)-1 | b+n <=32 & 32>n > 0 & 32 > b >= 0 |
Insert from right immediate | insrwi RA, RS, n, b | rlwinm RA, RS, 32-(b+n), b, (b+n)-1 | b+n <= 32 & 32>n > 0 |
Rotate left immediate | rotlwi RA, RS, n | rlwinm RA, RS, n, 0, 31 | 32 > n >= 0 |
Rotate right immediate | rotrwi RA, RS, n | rlwinm RA, RS, 32-n, 0, 31 | 32 > n >= 0 |
Rotate left | rotlw RA, RS, b | rlwinm RA, RS, RB, 0, 31 | None |
Shift left immediate | slwi RA, RS, n | rlwinm RA, RS, n, 0, 31-n | 32 > n >= 0 |
Shift right immediate | srwi RA, RS, n | rlwinm RA, RS, 32-n, n, 31 | 32 > n >= 0 |
Clear left immediate | clrlwi RA, RS, n | rlwinm RA, RS, 0, n, 31 | 32 > n >= 0 |
Clear right immediate | clrrwi RA, RS, n | rlwinm RA, RS, 0, 0, 31-n | 32 > n >= 0 |
Clear left and shift left immediate | clrslwi RA, RS, b, n | rlwinm RA, RS, b-n, 31-n | b-n >= 0 & 32 > n >= 0 & 32 > b>= 0 |
Notes:
extrwi RX, RY, 1, 0This is equivalent to:
rlwinm RX, RY, 1, 31, 31
insrwi RZ, RX, 1, 0This is equivalent to:
rlwimi RZ, RX, 31, 0, 0
slwi RX, RX, 8This is equivalent to:
rlwinm RX, RX, 8, 0, 23
clrlwi RX, RY, 16This is equivalent to:
rlwinm RX, RY, 0, 16, 31
Extended Instruction Mnemonics Overview.
Extended Mnemonics of Branch Instructions.
Extended Mnemonics of Condition Register Logical Instructions.
Extended Mnemonics of Fixed-Point Arithmetic Instructions.
Extended Mnemonics of Fixed-Point Compare Instructions.
Extended Mnemonics of Fixed-Point Load Instructions.
Extended Mnemonics of Fixed-Point Logical Instructions.
Extended Mnemonics of Fixed-Point Trap Instructions.
Extended Mnemonics of Moving from or to Special-Purpose Registers.
The rlwinm or rlinm (Rotate Left Word Immediate Then AND with Mask) instruction.