Compares the contents of two general-purpose registers logically.
See "Extended Mnemonics of Fixed-Point Compare Instructions" for more information.
The cmpl instruction compares the contents of general-purpose register (GPR) RA with the contents of GPR RB as unsigned integers and sets one of the bits in Condition Register Field BF.
BF can be Condition Register Field 0-7; programmers can specify which Condition Register Field will indicate the result of the operation.
The bits of Condition Register Field BF are interpreted as follows:
|0||LT||(RA) < SI|
|1||GT||(RA) > SI|
|2||EQ||(RA) = SI|
The cmpl instruction has one syntax form and does not affect the Fixed-Point Exception Register. Condition Register Field 0 is unaffected unless it is specified as BF by the programmer.
|BF||Specifies Condition Register Field 0-7 which indicates result of compare.|
|L||Must be set to 0 for the 32-bit subset architecture.|
|RA||Specifies source general-purpose register for operation.|
|RB||Specifies source general-purpose register for operation.|
The following code compares the contents of GPR 4 and GPR 5 as unsigned integers and sets Condition Register Field 0 to reflect the result of the operation:
# Assume GPR 4 contains 0xFFFF 0000. # Assume GPR 5 contains 0x7FFF 0000. # Assume 0 is Condition Register Field 0. cmpl 0,4,5 # The GT bit of Condition Register Field 0 is set.
The cmp (Compare) instruction, cmpi (Compare Immediate) instruction, cmpli (Compare Logical Immediate) instruction.