MicroChannel Adapter Database
  Home  |  Main  |  ID-Page 08  |  Prev 5FD8  |  Next 5FE1

Entry updated Feb 2006
 5FE0 ::: QUATECH QS-1000 Quad Asynchronous RS-232

Adapter ID

Adapter ID
QUATECH QS-1000 Quad Asynchronous RS-232
COM SER  Serial Port
QUAT  Quatech Inc.


Technical information contained in this page are edited excerpts from the QUATECH Reference Manual (qs-1000.pdf), Copyright © Quatech Inc.


Bus interfaceMicroChannel 16-bit
D-37 female connector *
Quad 6-wire RJ-11 (optional) *
Transmit driversMAX234
Receive buffersMC1489
I/O address range0000H - 0FFFFH (block mode)
Serial 1 - Serial 8 (discrete mode)
Interrupt levelsIRQ 3, 4, 9
Power requirements
1425mA typical, 1618mA maximum at +5V
Power requirements
1372mA typical, 1566mA maximum at +5V

* Connector pinouts are described in the QS-1000 Reference Manual.


The Quatech (Qua Tech) QS-1000 provides four independent asynchronous RS-232 serial communication channels for systems utilizing the MicroChannel architecture. Each port may be accessed individually from the predefined addresses of Serial 1 through Serial 8 or the four channels may be grouped together and located anywhere within the available I/O address range of the system. Two output options increase flexibility by allowing complete compatibility with a standard 25-pin connector or an abbreviated 6-wire phone jack style connector.

The QS-1000 serial interface is realized through four 16550 ACEs (Asynchronous Communication Elements). The 16550 is compatible with the 8250 and 16450 ACEs used in the PC/XT/AT models. In addition, the 16550 supports a FIFO mode to reduce CPU overhead at higher data rates.

The QS-1000 address and interrupt selections are accessed through the Programmable Option Select using the IBM installation utilities. In addition, jumpers are provided to select input clock frequency and on-board loopback of 'handshake' signals.

NOTE: If the phone jack option has been selected, jumpers J2 - J5 have been installed to control the output of handshake signals. If the D-37 option has been selected, jumpers J2 - J5 have been replaced by additional drivers and receivers to provide all of the available handshake signals.

16550 Features

The 16550 is an upgrade of the standard 16450 Asynchronous Communications Element (ACE). Designed to be compatible with the 16450, the 16550 enters the character mode on reset and in this mode will appear as a 16450 to user software. An additional mode, FIFO mode, can be selected to reduce CPU overhead at high data rates. The FIFO mode increases performance by providing two internal 16-byte FIFOs (one transmit and one receive) to buffer data and reduce the number of interrupts issued to the CPU.

Baud Rate Selection

The 16550 ACE determines the baud rate of the serial output from a combination of the clock input frequency and the value written to the divisor latches. Standard PC, PC/XT, PC/AT, and PS/2 serial interfaces use an input clock of 1.8432 MHz. To increase versatility, the QS-1000 uses an 18.432 MHz clock and a frequency divider circuit to produce the standard clock frequency.

Jumper block J1 is used to set the input frequency to the 16550. It may be connected to divide the clock input by 1, 2, 5, or 10. To maintain compatibility with adapters using a 1.8432 MHz input, J1 should be configured to divide by 10. Consult the QS-1000 Reference Manual for the table of divisor latch values for various input frequencies.

Addressing Options

Each channel of the QS-1000 uses 8 consecutive I/O address locations beginning on an even 8 byte boundary (xxx0H - xxx7H) or (xxx8H - xxxFH). Two addressing modes are available on the QS-1000: discrete addressing and block addressing.

  • Discrete Addressing Mode In the discrete addressing mode, each port may choose an individual base address. This mode allows maximum compatibility with software supporting the pre-defined addresses for Serial 1 through Serial 8. Channels 1 and 2 may select from Serial 1 through Serial 7, Channels 3 and 4 may choose from Serial 2 through Serial 8. Each channel may be individually disabled.

  • Block Addressing Mode In block addressing mode, the four serial channels are arranged to form a continous 32-byte block I/O addresses. This mode offers more compactness for custom software applications. The block may be placed anywhere in the available I/O address range on an even 32-byte boundary (e.g. 400H - 41FH , 620H - 63FH , 980H - 99FH ) using the IBM installation utilities and the Qua Tech address installation utility QTINSTAL.EXE.

    WARNING: In block mode, each channel may be individually disabled, but the I/O space assigned to that channel is still considered in use and may not be used by another device.

NOTE: To change the addressing mode, physically remove the QS-1000 from the system, configure the system with the reference diskette, physically reinsert the QS-1000 and configure again the system with the reference diskette (UZ).

External Connections

The QS-1000 is available with two output configurations. The first option uses a female D-37 connector labeled CN1 on the circuit board. This configuration can provide all of the signals found on the standard 25-pin connector for each of the channels. The second option uses a quad 6-wire RJ-11 phone jack style connector labeled CN2 on the circuit board. This configuration provides only transmit and receive and one set of handshake signals (RTS/CTS or DTR/DSR). Both output configurations have optional adapter cables available to provide standard D-25 connectors for each channel. The various connectors and pinouts are described in detail in the QS-1000 Reference Manual.


DOS drivers and utilities (QTINSTAL.EXE): ftp://quatech.com/Communication/Qs-1000.zip


Reference manual: ftp://quatech.com/manuals/qs-1000.pdf

ADF Adapter Description File


 Legal  |  Copyrightid-page  |  prev  |  next  |  top  
  Contents © 2006