Shifts the contents of a general-purpose register to the right by a specified number of bits and places the rotated contents in the MQ Register and the result in another general-purpose register.
Note: The sriq instruction is supported only in the POWER architecture.
| POWER | |
|---|---|
| sriq | RA,RS,SH |
| sriq. | RA,RS,SH |
The sriq instruction rotates the contents of the source general-purpose register (GPR) RS to the left 32 minus N bits, where N is the shift amount specified by SH, and stores the rotated word in the MQ Register, and the logical AND of the rotated word and the generated mask in GPR RA. The mask consists of N zeros followed by 32 minus N ones.
The sriq instruction has two syntax forms. Each syntax form has a different effect on Condition Register Field 0.
| Syntax Form | Overflow Exception (OE) | Fixed-Point Exception Register | Record Bit (Rc) | Condition Register Field 0 |
| sriq | None | None | 0 | None |
| sriq. | None | None | 1 | LT,GT,EQ,SO |
The two syntax forms of the sriq instruction never affect the Fixed-Point Exception Register. If the syntax form sets the Record (Rc) bit to 1, the instruction affects the Less Than (LT) zero, Greater Than (GT) zero, Equal To (EQ) zero, and Summary Overflow (SO) bits in Condition Register Field 0.
| RA | Specifies target general-purpose register where result of operation is stored. |
| RS | Specifies source general-purpose register for operation. |
| SH | Specifies value for shift amount. |
# Assume GPR 4 contains 0x9000 300F. sriq 6,4,0xC # GPR 6 now contains 0x0009 0003. # The MQ Register now contains 0x00F9 0003.
# Assume GPR 4 contains 0xB000 300F. sriq. 6,4,0x14 # GPR 6 now contains 0x0000 0B00. # The MQ Register now contains 0x0300 FB00. # Condition Register Field 0 now contains 0x4.
Fixed-Point Rotate and Shift Instructions.