Each hardware interrupt has an interrupt level and an interrupt priority. The interrupt level defines the source of the interrupt. There are basically two types of interrupt levels: system and bus. The system bus interrupts are generated from the Micro Channel bus and system I/O. Examples of system interrupts are the timer and serial link interrupts.
The interrupt level of a system interrupt is defined in the sys/intr.h file. The interrupt level of a bus interrupt is one of the resources managed by the bus configuration methods.
The interrupt priority defines which of a set of pending interrupts is serviced first. INTMAX is the most favored interrupt priority and INTBASE is the least favored interrupt priority. The interrupt priorities for bus interrupts range from INTCLASS0 to INTCLASS3. The rest of the interrupt priorities are reserved for the base kernel. Interrupts that cannot be serviced within the time limits specified for bus interrupts qualify as off-level interrupts.
A device's interrupt priority is selected based on two criteria: its maximum interrupt latency requirements and the device driver's interrupt execution time. The interrupt latency requirement is the maximum time within which an interrupt must be serviced. (If it is not serviced in this time, some event is lost or performance is degraded seriously.) The interrupt execution time is the number of machine cycles required by the device driver to service the interrupt. Interrupts with a short interrupt latency time must have a short interrupt service time.
The general rule for interrupt service times is based on the following interrupt priority table:
| Priority | Service Time (machine cycles) |
|---|---|
| INTCLASS0 | 200 cycles |
| INTCLASS1 | 400 cycles |
| INTCLASS2 | 600 cycles |
| INTCLASS3 | 800 cycles |
The valid interrupt priorities are defined in the /usr/include/sys/intr.h file.
See Interrupt Management Services for a list of these services.