Queries or changes the floating-point exception enable (FE) bit in the Machine Status register (MSR).
Note: This subroutine has been replaced by the fp_trapstate subroutine. The fp_cpusync subroutine is supported for compatibility, but the fp_trapstate subroutine should be used for development.
#include <fptrap.h>
int fp_cpusync (Flag); int Flag;
The fp_cpusync subroutine is a service routine used to query, set, or reset the Machine Status Register (MSR) floating-point exception enable (FE) bit. The MSR FE bit determines whether a processor runs in pipeline or serial mode. Floating-point traps can only be generated by the hardware when the processor is in synchronous mode.
The fp_cpusync subroutine changes only the MSR FE bit. It is a service routine for use in developing custom floating-point exception-handling software. If you are using the fp_enable or fp_enable_all subroutine or the fp_sh_trap_info or fp_sh_set_stat subroutine, you must use the fp_trap subroutine to place the process in serial mode.
If called with any other value, the fp_cpusync subroutine returns FP_SYNC_ERROR.
If called with the FP_SYNC_OFF or FP_SYNC_ON flag, the fp_cpusync subroutine returns a value indicating which flag was in the previous state of the process.
If called with the FP_SYNC _QUERY flag, the fp_cpusync subroutine returns a value indicating the current state of the process, either the FP_SYNC_OFF or FP_SYNC_ON flag.
If the fp_cpusync subroutine is called with an invalid parameter, the subroutine returns FP_SYNC_ERROR. No other errors are reported.
The fp_any_enable, fp_is_enabled, fp_enable_all, fp_enable, fp_disable_all, or fp_disable subroutine, fp_clr_flag, fpset_flag, fp_read_flag, or fp_swap_flag subroutine, sigaction, sigvec, or signal subroutine.
Floating-Point Processor Overview in POWERstation and POWERserver Hardware Technical Information-General Architectures.
Floating-Point Exceptions Overview in AIX Version 4.3 General Programming Concepts: Writing and Debugging Programs.