Used in conjunction with a preceding lwarx instruction to emulate a read-modify-write operation on a specified memory location.
Note: The stwcx. instruction is supported only in the PowerPC architecture.
The stwcx. and lwarx instructions are primitive, or simple, instructions used to perform a read-modify-write operation to storage. If the store is performed, the use of the stwcx. and lwarx instructions ensures that no other processor or mechanism has modified the target memory location between the time the lwarx instruction is executed and the time the stwcx. instruction completes.
Consider the following when using the stwcx. instruction:
The stwcx instruction has one syntax form and does not affect the Fixed-Point Exception Register. If the EA is not a multiple of 4, the results are boundedly undefined.
|RS||Specifies source general-purpose register of stored data.|
|RA||Specifies source general-purpose register for EA calculation.|
|RB||Specifies source general-purpose register for EA calculation.|
# Assume that GPR 4 contains the new value to be stored. # Assume that GPR 3 contains the address of the word # to be loaded and replaced. loop: lwarx r5,0,r3 # Load and reserve stwcx. r4,0,r3 # Store new value if still # reserved bne- loop # Loop if lost reservation # The new value is now in storage. # The old value is returned to GPR 4.
# Assume that GPR 5 contains the new value to be stored after # a successful match. # Assume that GPR 3 contains the address of the word # to be tested. # Assume that GPR 4 contains the value to be compared against # the value in memory. loop: lwarxr 6,0,r3 # Load and reserve cmpw r4,r6 # Are the first two operands # equal? bne- exit # Skip if not equal stwcx. r5,0,r3 # Store new value if still # reserved bne- loop # Loop if lost reservation exit: mrr 4,r6 # Return value from storage # The old value is returned to GPR 4. # If a match was made, storage contains the new value.If the value in the register equals the word in storage, the value from a second register is stored in the word in storage. If they are unequal, the word from storage is loaded into the first register and the EQ bit of the Condition Register Field 0 is set to indicate the result of the comparison.
The lwarx (Load Word and Reserve Indexed) instruction.
Processing and Storage