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AIX Version 4.3 Assembler Language Reference

stfsu (Store Floating-Point Single with Update) Instruction


Stores a word of data from a floating-point register into a specified location in memory and possibly places the address in a general-purpose register.


stfsu FRS,D(RA)


The stfsu instruction converts the contents of floating-point register (FPR) FRS to single-precision and stores the result into the word of storage addressed by the effective address (EA).

If general-purpose register (GPR) RA is not 0, the EA is the sum of the contents of GPR RA and D, a 16-bit signed two's complement integer sign-extended to 32 bits. If GPR RA is 0, then the EA is D.

If GPR RA does not equal 0 and the storage access does not cause Alignment Interrupt or Data Storage Interrupt, then the EA is stored in GPR RA.

The stfsu instruction has one syntax form and does not affect the Floating-Point Status and Control Register or Condition Register Field 0.


FRS Specifies floating-point register of stored data.
D Specifies a 16-bit, signed two's complement integer sign-extended to 32 bits for EA calculation.
RA Specifies source general-purpose register for EA calculation and possible address update.


The following code stores the single-precision contents of FPR 6 into a location in memory and stores the address in GPR 4:

.csect data[rw]
buffer: .long 0
# Assume FPR 6 contains 0x4865 6C6C 6F20 776F.
# Assume GPR 4 contains the address of csect data[rw].
.csect text[pr]
stfsu 6,buffer(4)
# GPR 4 now contains the address of buffer.
# buffer now contains 0x432B 6363.

Related Information

Floating-Point Processor.

Floating-Point Load and Store Instructions.

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