Shift the contents of a general purpose register left by the number of bits specified by the contents of another general purpose register.
| PowerPC | |
|---|---|
| sld | RA, RS, RB (OE=0 Rc=0) |
| sld. | RA, RS, RB (OE=0 Rc=1) |
The contents of general purpose register (GPR) RS are shifted left the number of bits specified by the low-order seven bits of GPR RB. Bits shifted out of position 0 are lost. Zeros are supplied to the vacated positions on the right. The result is placed into GPR RA. Shift amounts from 64 to 127 give a zero result.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.