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AIX Version 4.3 Assembler Language Reference

frsqrte (Floating Reciprocal Square Root Estimate) Instruction


Calculates a double-precision estimated value of the reciprocal of the square root of a floating-point operand.

Note: The frsqrte instruction is defined only in the PowerPC architecture and is an optional instruction. It is supported on the PowerPC 603 RISC Microprocessor and the PowerPC 604 RISC Microprocessor, but not supported on the PowerPC 601 RISC Microprocessor.


frsqrte FRT,FRB
frsqrte. FRT,FRB


The frsqrte instruction computes a double-precision estimate of the reciprocal of the square root of the 64-bit, double-precision floating-point operand in floating-point register (FPR) FRB and places the result in FPR FRT.

The estimate placed into register FRT is correct to a precision of one part in 32 of the reciprocal of the square root of FRB. The value placed in FRT may vary between implementations and between different executions on the same implementation.

The following table summarizes special conditions:

Special Conditions

Operand Result Exception
Negative Infinity QNaN1 VXSQRT
Less Than 0 QNaN1 VXSQRT
Negative 0 Negative Infinity2 ZX
Positive 0 Positive Infinity2 ZX
Positive Infinity Positive 0 None
QNaN QNaN None

1No result if FPSCRVE = 1.

2No result if FPSCRZE = 1.

FPSCRFPRF is set to the class and sign of the result, except for Invalid Operation Exceptions when FPSCRVE = 1 and Zero Divide Exceptions when FPSCRZE = 1.

The frsqrte instruction has two syntax forms. Both syntax forms always affect the FPSCR. Each syntax form has a different effect on Condition Register Field 1.

Syntax Form Floating-Point Status and Control Register Record Bit (Rc) Condition Register Field 1

The frstrte. syntax form sets the Record (Rc) bit to 1; and the instruction affects the Floating-Point Exception (FX), Floating-Point Enabled Exception (FEX), Floating-Point Invalid Operation Exception (VX), and Floating-Point Overflow Exception (OX) bits in Condition Register Field 1 (CR1). The frstrte syntax form sets the Record (Rc) bit to 0; and the instruction does not affect Condition Register Field 1 (CR1).


FRT Specifies target floating-point register for operation.
FRB Specifies source floating-point register for operation.

Related Information

Floating-Point Processor.

Floating-Point Arithmetic Instructions.

Interpreting the Contents of a Floating-Point Register.

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