Copy the low-order 32 bits of a general purpose register into another general purpose register, and sign extend the fullword to a double-word in size (64 bits).
|extsw||RA, RS (Rc=0)|
|extsw.||RA, RS (Rc=1)|
The contents of the low-order 32 bits of general purpose register (GPR) RS are placed into the low-order 32 bits of GPR RA. Bit 32 of GPR RS is used to fill the high-order 32 bits of GPR RA.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
|RA||Specifies the target general purpose register for the result of the operation.|
|RS||Specifies the source general purpose register for the operand of instruction.|
This instruction is defined only for 64-bit implementations. Using it on a 32-bit implementation will cause the system illegal instruction error handler to be invoked.