/*
 * This is a default xparameters.h for ML300.
 * It should be replaced with the file generated by the
 * Xilinx system generation tools.
 */
#ifndef XPARAMETERS_H	 /* prevent circular inclusions */
#define XPARAMETERS_H	 /* by using protection macros */

#define XPAR_OSCILLATOR_FREQ_HZ         100000000
#define XPAR_CORE_CLOCK_FREQ_HZ		(3*XPAR_OSCILLATOR_FREQ_HZ)
#define XPAR_PLB_CLOCK_FREQ_HZ		(1*XPAR_OSCILLATOR_FREQ_HZ)
#define XPAR_UARTNS550_0_CLOCK_FREQ_HZ	(1*XPAR_OSCILLATOR_FREQ_HZ)
#define XPAR_PCI_0_CLOCK_FREQ_HZ	(XPAR_OSCILLATOR_FREQ_HZ/3)

#define XPAR_DDR_0_SIZE			(128*1024*1024)

#define XPAR_PERSISTENT_0_IIC_0_BASEADDR  1024
#define XPAR_PERSISTENT_0_IIC_0_HIGHADDR  2047
#define XPAR_PERSISTENT_0_IIC_0_EEPROMADDR 0xA0

#define XPAR_XEMAC_NUM_INSTANCES	1
#define XPAR_EMAC_0_DEVICE_ID		0
#define XPAR_EMAC_0_BASEADDR		0x60000000
#define XPAR_EMAC_0_HIGHADDR		0x60003FFF
#define XPAR_EMAC_0_DMA_PRESENT		FALSE
#define XPAR_EMAC_0_ERR_COUNT_EXIST	TRUE
#define XPAR_EMAC_0_MII_EXIST		TRUE
#define XPAR_INTC_0_EMAC_0_VEC_ID	28

#define XPAR_XGPIO_NUM_INSTANCES	1
#define XPAR_GPIO_0_BASEADDR		0x90000000
#define XPAR_GPIO_0_HIGHADDR		0x90000008
#define XPAR_GPIO_0_DEVICE_ID		110

#define XPAR_XIIC_NUM_INSTANCES		1
#define XPAR_IIC_0_BASEADDR		0xA8000000
#define XPAR_IIC_0_HIGHADDR		0xA8000FFF
#define XPAR_IIC_0_DEVICE_ID		90
#define XPAR_IIC_0_TEN_BIT_ADR		FALSE
#define XPAR_INTC_0_IIC_0_VEC_ID	29

#define XPAR_XPCI_NUM_INSTANCES	        1
#define XPAR_PCI_0_CONFIG_ADDR		0x3c000000
#define XPAR_PCI_0_CONFIG_DATA          0x3c000004
#define XPAR_PCI_0_LCONFIG_ADDR         0x3e000000
#define XPAR_PCI_0_MEM_BASEADDR         0x20000000
#define XPAR_PCI_0_MEM_HIGHADDR         0x37ffffff
#define XPAR_PCI_0_IO_BASEADDR          0x38000000
#define XPAR_PCI_0_IO_HIGHADDR          0x3bffffff
#define XPAR_INTC_0_PCI_0_VEC_ID_A      23
#define XPAR_INTC_0_PCI_0_VEC_ID_B      23
#define XPAR_INTC_0_PCI_0_VEC_ID_C      23
#define XPAR_INTC_0_PCI_0_VEC_ID_D      23

#define XPAR_XPS2_NUM_INSTANCES		2
#define XPAR_PS2_0_DEVICE_ID		50
#define XPAR_PS2_0_BASEADDR		0xA9000000
#define XPAR_PS2_0_HIGHADDR		0xA900003F
#define XPAR_PS2_1_DEVICE_ID		51
#define XPAR_PS2_1_BASEADDR		0xA9001000
#define XPAR_INTC_0_PS2_0_VEC_ID	27
#define XPAR_INTC_0_PS2_1_VEC_ID	26

#define XPAR_XSYSACE_NUM_INSTANCES	1
#define XPAR_SYSACE_0_BASEADDR		0xCF000000
#define XPAR_SYSACE_0_HIGHADDR		0xCF000FFF
#define XPAR_SYSACE_0_DEVICE_ID		160
#define XPAR_INTC_0_SYSACE_0_VEC_ID	22

#define XPAR_XTOUCHSCREEN_NUM_INSTANCES	1
#define XPAR_TOUCHSCREEN_0_BASEADDR	0xAA000000
#define XPAR_TOUCHSCREEN_0_HIGHADDR	0xAA000007
#define XPAR_TOUCHSCREEN_0_DEVICE_ID	60
#define XPAR_INTC_0_TOUCHSCREEN_0_VEC_ID 25

#define XPAR_UARTNS550_0_BASEADDR	0xA0001000
#define XPAR_INTC_0_UARTNS550_0_VEC_ID	31

#define XPAR_UARTNS550_1_BASEADDR	0xA0011000
#define XPAR_INTC_0_UARTNS550_1_VEC_ID	30

#define XPAR_TFT_0_BASEADDR		0xD0000200

#define XPAR_INTC_0_BASEADDR		0xD0000FC0

#endif		    /* end of protection macro */
