IBM has recently discovered a problem with
one of our reliability features in SF240_202 or SF240_201 system firmware
that may impact a subset of our previous generation P5 systems. While the
probability of encountering this problem is small, the impact is high
(system checkstop). Systems affected are 9110-510, 9111-520,
9113-550, 9117-570, 9123-710, and 9124-720.
Problem Description:
This issue applies only to those Power5 systems that utilize DDR1
memory and are running SF240_202 or SF240_201 system firmware. When a
predictive event requires the bit-steering feature to be implemented,
there is a bug which will result in a system checkstop. This problem does
not exist in previous levels of systems firmware, and a fix is scheduled
to be released in the next SF240 release.
SF240_202 was removed from the microcode
website (SF240_201 was a manufacturing release only and was never available
on the Microcode download web page) for the systems listed above.
For any customer with the affected system types that have SF240_202 or
SF240_201 and DDR1 memory, IBM is recommending the system be taken back
to level SF235_185 until the next SF240 release is available on the website.
The procedure for migrating to
previous release of firmware is identical to the one used to migrate to
a new release. The instructions for installing a new release can be
found at:
http://publib.boulder.ibm.com/infocenter/eserver/v1r3s/index.jsp?topic=/ipha5/fix_serv_firm_kick.htm
For HMC attached systems, choose the link entitled: Upgrading
to a new firmware (Licensed Internal Code) release through the HMC
For non HMC attached systems, choose the link entitled: Getting
server firmware fixes through AIX or Linux without an HMC
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