PS/2 Memory Errata
Unsordid memory trivia for PS/2s not specific to a singular system.

Memory in A1-B1 or J1-J3 fail in 90 / 95 systems 
ECC and FPM Support
Loading SIMM Pairs
Support for Greater Than 16MB
Support for Greater Than 64MB
IBM Presence Detect SIMMs 


Memory in A1-B1 or J1-J3 fail in 90 / 95 systems 
  One may encounter failing memory in A1/B1 or J1/J3 (possibly in other systems). PS/2s test the first SIMM or pair of SIMMs very rigorously, because if the low memory (first 1MB) fails, the system stops. If that first MB is undependable, you may get data corruption as a result of altered drivers or messed up O/S code.

If you are loading up your 90 or 95, and get a message that one or both SIMMs in the first pair are bad, SIMMply swap in another (matching) SIMM or pair from a later pair (eg. A2/B2) and run advanced diags on them. You must run advanced diags to clear the error from the previous SIMM configuration.

NOTE: The memory controller in the 90 and 95 can handle pairs of SIMMs with mixed speeds but same sizes, but accesses to that pair will be at the speed of the slowest SIMM.

ECC and FPM Support
   All PS/2 systems support Fast Page Mode (FPM) memory. Older systems may use 30 pin SIMMs, later systems use 72 pin SIMMs.

  Some of the later systems contain memory controllers that support FPM -OR- ECC. But either memory type is exclusive of the other

In the case of the Model 90 or 95, the first complex to support ECC is the Model M 486DX-50 (only double deck complex). It supports EITHER 64MB of FPM -OR- 64MB of ECC. Do not mix FPM and ECC in any combination, either in pairs (A1/B1 FPM and A2/B2 ECC) or by banks (A1-A4 FPM and B1-B4 ECC). Mixing pairs will result at best with the first matched pair being enabled, the next (opposing) pair deallocated, or in the case of banks, nothing because the system memory controller can't get the first pair to pass the BIST.

The later Type 4 complexi all support either 64MB of parity -OR- 256MB of ECC.

Loading SIMM Pairs
  In systems with an even number of SIMM sockets (and no soldered-on planar memory like a 9556), load SIMMs in matched pairs (size and speed). Load the largest pair first, then smaller and slower pairs in the following SIMM sockets.

For systems with soldered planar memory with an odd number of SIMM sockets, you are facing either no support for interleaved memory, or only a single pair of SIMMs in interleaved memory support. Each system implements memory accessing according to it's design.

The first system to support interleaved memory is the Model 70-486. (IIRC)

Support for Greater Than 16MB
  All PS/2 systems with a 286 or 386 have a maximum of 16MB addressable memory, due to the 24 bit memory address. This also includes 386 variants like the 486SLC.

For 24 bit address systems (either with an odd number of SIMMs (three) or soldered-on memory and SIMM sockets), you will get 16MB of total memory if you exceed 16MB of SIMM.

As an example, the 9533 comes with 4MB soldered on-planar, and two SIMM sockets. Now if you load two 8MB SIMMs, you will get 16MB of total RAM. But wait, 4+8+8=20, right? Nope, everything over 16MB cannot be addressed.

Support for Greater Than 64MB
  In the beginning, memory addressing was limited to 24 bits. With the advent of the 486, 32 bit memory addressing was possible. Unfortunately, not everybody updated their programs or driver support to incorporate support for 32 bit memory addressing. Part of this problem is the code to determine memory size.

IBM did update their code to support 32 bit addressing, and provided drivers that kept memory addressing below 16MB. But again, proper support for memory size varied.

In the case of Windows 9x, the limit of 64MB was finally overcome with HIMEMUPD.EXE this is simple to apply and allows you to see and use as much as your system can recognize.

IBM Presence Detect SIMMs
   Most IBM PS/2s that require 72 pin SIMMs with Presence Detect, which is four lines on a SIMM that are either open or shorted (pins 71-68). IBM SIMMs with PD are usually 36 bits wide (32bits data plus 4bits parity) or 39 bits wide (32bits data plus 7bits ECC). In the case of ECC, there is a further line (36?) that is grounded.

  My children, do not be led astray by RS/6000 SIMMs. The RS/6000 32MB SIMMs are 40 bits wide. They do NOT work in a 95A, even when you alter the PD bits to agree with the PS/2 PD scheme.

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